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Volumn , Issue , 2006, Pages 2039-2042

5.8GHz ETC SiGe-MMIC transceiver having improved PA-VCO isolation with thin silicon substrate

Author keywords

MMICs; Power amplifiers; Silicon; Switches; Transceivers; Voltage controlled oscillators

Indexed keywords

AMPLITUDE SHIFT KEYING (ASK); SILICON SUBSTRATES;

EID: 34250378763     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MWSYM.2006.249855     Document Type: Conference Paper
Times cited : (12)

References (8)
  • 1
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    • Lawrence E. Larson, "Silicon Technology Tradeoffs for Radio-Frequency/Mixed-Signal "Systems-on-a-Chip"", IEEE Trans. Electron Devices, vol.50, pp.683-699, March 2003.
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  • 2
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    • Single-Chip 5.8GHZ ETC Transceiver IC with PLL and Demodulation Circuits using SiGe HBT/CMOS
    • February
    • T. Matsuda, et al., "Single-Chip 5.8GHZ ETC Transceiver IC with PLL and Demodulation Circuits using SiGe HBT/CMOS", ISSCC Dig. Tech. Papers, pp.96, 449, February 2002.
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    • Matsuda, T.1
  • 3
    • 0036441806 scopus 로고    scopus 로고
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  • 4
    • 10444279211 scopus 로고    scopus 로고
    • Circuit Partitioning and RF Isolation by Through-Substrate Trenches
    • S. M. Sinaga, et al., "Circuit Partitioning and RF Isolation by Through-Substrate Trenches". IEEE Electronic Components and Tech. Conf., pp.1519-1523, 2004.
    • (2004) IEEE Electronic Components and Tech. Conf , pp. 1519-1523
    • Sinaga, S.M.1
  • 5
    • 0035686309 scopus 로고    scopus 로고
    • Deep Trench Guard Technology to Suppress Coupling between Inductors in Silicon RF ICs
    • June
    • C. S. Kim, et al., "Deep Trench Guard Technology to Suppress Coupling between Inductors in Silicon RF ICs", IEEE MTT-s Symp. Digest, pp. 1873-1876, June 2001.
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    • Kim, C.S.1
  • 6
    • 0141918454 scopus 로고    scopus 로고
    • The Importance of Distributed Grounding in Combination With Porous Si Trenches for the Reduction of RF Crosstalk Through p- Si Substrate
    • October
    • H-S Kim, et al., "The Importance of Distributed Grounding in Combination With Porous Si Trenches for the Reduction of RF Crosstalk Through p- Si Substrate", IEEE Elecron Device Lett., vol.24, pp.640-642, October 2003.
    • (2003) IEEE Elecron Device Lett , vol.24 , pp. 640-642
    • Kim, H.-S.1
  • 7
    • 0034258860 scopus 로고    scopus 로고
    • Fabrication of Very High Resistivity Si with Low Loss and Cross Talk
    • September
    • Y. H. Wu, et al., "Fabrication of Very High Resistivity Si with Low Loss and Cross Talk", IEEE Elecron Device Lett., vol.21, pp.442-444, September 2000.
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  • 8
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    • Si Substrate Resistivity Design for On-Chip Matching Circuit Based on Electro-Magnetic Simulation
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    • M. Ono, et al, "Si Substrate Resistivity Design for On-Chip Matching Circuit Based on Electro-Magnetic Simulation", IEICE Trans. electron., vol. E84-C, no. 7, July 2001.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.