Deep trench guard technology to suppress coupling between inductors in silicon RF ICs

IEEE MTT-S International Microwave Symposium Digest

Volumn 1, Issue , 2001, Pages 1873-1876

  Kim, Cheon Soo ^a   Park, Piljae ^a   Park, Joung Woo ^a   Hwang, Nam ^a   Yu, Hyun Kyu ^a  

^a Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CROSSTALK; INDUCTANCE; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; POLYSILICON; SPURIOUS SIGNAL NOISE; TRANSCEIVERS;

DEEP TRENCH GUARD TECHNOLOGY; MIXED SIGNAL; NOISY CIRCUIT BLOCK;

ELECTRIC INDUCTORS;

EID: 0035686309     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. CMOS RF ICs for 900MHz-2.4GHz band wireless communication networks
2. 2.7 volt performance of high dynamic range receiver ICs for dual-band CDMA handsets
3. Highly integrated MMIC upconverter/drivers for cellular and PCS CDMA handsets
4. Substrate noise coupling through planar spiral inductor
5. Experimental results and modeling techniques for substrate noise in mixed-signal integrated circuits
6. On-chip spiral inductors with patterned ground shields for Si-based RF IC's
7. RF circuit design aspects of spiral inductors on silicon
8. Design guide of coupling between inductors and its effect on reverse isolation of a CMOS LNA