Enhanced performance of solution-processed regioregular poly(3-hexylthiophene) thin-film transistors using planar bottom-contact architecture

Applied Physics Letters

Volumn 90, Issue 22, 2007, Pages

  Xu, Mingsheng ^a,b   Nagai, Keita ^a   Nakamura, Masakazu ^a   Kudo, Kazuhiro ^a   Iizuka, Masaaki ^a  

^a CHIBA UNIVERSITY   (Japan)

^b National Institute for Materials Science   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRODES; GATES (TRANSISTOR); SILICA; SURFACE TREATMENT; THRESHOLD VOLTAGE;

ACTIVE LAYERS; DRAIN ELECTRODES; PLANAR BOTTOM CONTACT ARCHITECTURE;

THIN FILM TRANSISTORS;

EID: 34249870588     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.2745221     Document Type: Article

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