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1
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29144523105
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New era of silicon technologies due to radical reaction based semiconductor manufacturing
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Jan
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T. Ohmi, M. Hirayama, and A. Teramoto, "New era of silicon technologies due to radical reaction based semiconductor manufacturing," J. Phys. D, Appl. Phys., vol. 39, no. 1, pp. R1-R17, Jan. 2006.
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(2006)
J. Phys. D, Appl. Phys
, vol.39
, Issue.1
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Ohmi, T.1
Hirayama, M.2
Teramoto, A.3
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2
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34249911527
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2 Interface-4. Pennington, NJ: Electrochemical Soc., 2000, pp. 113-124. PV2000-2.
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2 Interface-4. Pennington, NJ: Electrochemical Soc., 2000, pp. 113-124. PV2000-2.
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3
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0035423581
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Highly reliable ultrathin silicon oxide film formation at low temperature by oxygen radical generated in high-density krypton plasma
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Aug
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K. Sekine, Y. Saito, M. Hirayama, and T. Ohmi, "Highly reliable ultrathin silicon oxide film formation at low temperature by oxygen radical generated in high-density krypton plasma," IEEE Trans. Electron Devices, vol. 48, no. 8, pp. 1550-1555, Aug. 2001.
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(2001)
IEEE Trans. Electron Devices
, vol.48
, Issue.8
, pp. 1550-1555
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Sekine, K.1
Saito, Y.2
Hirayama, M.3
Ohmi, T.4
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4
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0035507941
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2 microwave-exited high-density plasma
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Nov
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2 microwave-exited high-density plasma," IEEE Trans. Semicond. Manuf., vol. 14, no. 4, pp. 418-420, Nov. 2001.
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(2001)
IEEE Trans. Semicond. Manuf
, vol.14
, Issue.4
, pp. 418-420
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Hamada, T.1
Saito, Y.2
Hirayama, M.3
Sugawa, S.4
Aharoni, H.5
Ohmi, T.6
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5
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0034225418
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Highly robust ultrathin silicon nitride films grown at low-temperature by microwave-exited high-density plasma for giga scale integration
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Jul
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K. Sekine, Y. Saito, M. Hirayama, and T. Ohmi, "Highly robust ultrathin silicon nitride films grown at low-temperature by microwave-exited high-density plasma for giga scale integration," IEEE Trans. Electron Devices, vol. 47, no. 7, pp. 1370-1374, Jul. 2000.
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(2000)
IEEE Trans. Electron Devices
, vol.47
, Issue.7
, pp. 1370-1374
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Sekine, K.1
Saito, Y.2
Hirayama, M.3
Ohmi, T.4
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6
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0035714881
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Advantage of silicon nitride gate insulator transistor by using microwave-excited high-density plasma for applying 100 nm technology node
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S. Sugawa, I. Ohshima, H. Ishmo, Y. Saito, M. Hirayama, and T. Ohmi, "Advantage of silicon nitride gate insulator transistor by using microwave-excited high-density plasma for applying 100 nm technology node," in IEDM Tech. Dig., 2001, pp. 817-820.
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(2001)
IEDM Tech. Dig
, pp. 817-820
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Sugawa, S.1
Ohshima, I.2
Ishmo, H.3
Saito, Y.4
Hirayama, M.5
Ohmi, T.6
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7
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32844463577
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2 Interface-5.
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2 Interface-5.
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8
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34249893981
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4 films formed by directly radical nitridation on Si (110) and Si (100) surfaces
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4 films formed by directly radical nitridation on Si (110) and Si (100) surfaces," in Proc. Ext. Abstr. Int. Conf. Solid State Devices and Mater., 2006, pp. 386-387.
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(2006)
Proc. Ext. Abstr. Int. Conf. Solid State Devices and Mater
, pp. 386-387
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Higuchi, M.1
Aratani, T.2
Hamada, T.3
Teramoto, A.4
Hattori, T.5
Sugawa, S.6
Ohmi, T.7
Shinagawa, S.8
Nohira, H.9
Ikenaga, E.10
Kobayashi, K.11
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9
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0038686449
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A technology for reducing flicker noise for ULSI applications
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Apr
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K. Tanaka, K. Watanabe, H. Ishino, S. Sugawa, and T. Ohmi, "A technology for reducing flicker noise for ULSI applications," Jpn. J. Appl. Phys., vol. 42, no. 4B, pp. 2106-2109, Apr. 2003.
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(2003)
Jpn. J. Appl. Phys
, vol.42
, Issue.4 B
, pp. 2106-2109
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Tanaka, K.1
Watanabe, K.2
Ishino, H.3
Sugawa, S.4
Ohmi, T.5
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10
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33645732196
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1/f noise suppression of pMOSFETs fabricated on Si(100) and Si(110) using an alkali-free cleaning process
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Apr
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P. Gaubert, A. Teramoto, T. Hamada, M. Yamamoto, K. Koji, and T. Ohmi, "1/f noise suppression of pMOSFETs fabricated on Si(100) and Si(110) using an alkali-free cleaning process," IEEE Trans. Electron Devices vol. 53, no. 4, pp. 851-856, Apr. 2006.
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(2006)
IEEE Trans. Electron Devices
, vol.53
, Issue.4
, pp. 851-856
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Gaubert, P.1
Teramoto, A.2
Hamada, T.3
Yamamoto, M.4
Koji, K.5
Ohmi, T.6
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11
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0842331297
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Low noise balanced-CMOS on Si(110) surface for analog/digital mixed signal circuits
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A. Teramoto, T. Hamada, H. Akahori, K. Nii, T. Suwa, K. Kotani, M. Hirayama, S. Sugawa, and T. Ohmi, "Low noise balanced-CMOS on Si(110) surface for analog/digital mixed signal circuits," in IEDM Tech. Dig., 2003, pp. 801-804.
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(2003)
IEDM Tech. Dig
, pp. 801-804
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Teramoto, A.1
Hamada, T.2
Akahori, H.3
Nii, K.4
Suwa, T.5
Kotani, K.6
Hirayama, M.7
Sugawa, S.8
Ohmi, T.9
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12
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0033537516
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Roughening of single-crystal silicon surface etched by KOH water solution
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Mar
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K. Sato, M. Shikida, T. Yamashiro, M. Tsunekawa, and S. Ito, "Roughening of single-crystal silicon surface etched by KOH water solution," Sens. Actuators, vol. 73, no. 1/2, pp. 112-130, Mar. 1999.
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(1999)
Sens. Actuators
, vol.73
, Issue.1-2
, pp. 112-130
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Sato, K.1
Shikida, M.2
Yamashiro, T.3
Tsunekawa, M.4
Ito, S.5
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13
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5844384353
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Atomic scale flattening and hydrogen termination of the Si(001) surface by wet-chemical treatment
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May
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Y. Morita and H. Tokumoto, "Atomic scale flattening and hydrogen termination of the Si(001) surface by wet-chemical treatment," J. Vac. Sci. Technol. A, Vac. Surf. Films, vol. 14, no. 3, pp. 854-858, May 1996.
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(1996)
J. Vac. Sci. Technol. A, Vac. Surf. Films
, vol.14
, Issue.3
, pp. 854-858
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Morita, Y.1
Tokumoto, H.2
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14
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0345458800
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Formation of metal silicide-silicon contact with ultralow contact resistance by silicon-capping silicidation technique
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Jun
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K. Yamada, K. Tomita, and T. Ohmi, "Formation of metal silicide-silicon contact with ultralow contact resistance by silicon-capping silicidation technique," Appl. Phys. Lett., vol. 64, no. 25, pp. 3449-3451, Jun. 1994.
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(1994)
Appl. Phys. Lett
, vol.64
, Issue.25
, pp. 3449-3451
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Yamada, K.1
Tomita, K.2
Ohmi, T.3
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15
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0025404175
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Conduction mechanism in thin-film accumulation-mode SOI p-channel MOSFETs
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Mar
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J. Colinge, "Conduction mechanism in thin-film accumulation-mode SOI p-channel MOSFETs," IEEE Trans. Electron Devices, vol. 37, no. 3, pp. 718-723, Mar. 1990.
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(1990)
IEEE Trans. Electron Devices
, vol.37
, Issue.3
, pp. 718-723
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Colinge, J.1
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16
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33646915205
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Impact of improved high-performance Si(110)-oriented metal-oxide-semiconductor field-effect transistors using accumulation-mode fully depleted silicon-on-insulator devices
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W. Cheng, A. Teramoto, M. Hirayama, S. Sugawa, and T. Ohmi, "Impact of improved high-performance Si(110)-oriented metal-oxide-semiconductor field-effect transistors using accumulation-mode fully depleted silicon-on-insulator devices," Jpn. J. Appl. Phys., vol. 45, no. 4B, pp. 3110-3116, 2006.
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(2006)
Jpn. J. Appl. Phys
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, Issue.4 B
, pp. 3110-3116
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Cheng, W.1
Teramoto, A.2
Hirayama, M.3
Sugawa, S.4
Ohmi, T.5
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17
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34547382376
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Impact of improved mobility and low flicker noise MOS transistors using accumulation-mode fully depleted silicon-on-insulator devices
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W. Cheng, A. Teramoto, P. Gaubert, M. Hirayama, and T. Ohmi, "Impact of improved mobility and low flicker noise MOS transistors using accumulation-mode fully depleted silicon-on-insulator devices," in Proc. 8th Int. Conf. Solid-State and Integr. Circuit Technol., 2006, pp. 65-67.
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(2006)
Proc. 8th Int. Conf. Solid-State and Integr. Circuit Technol
, pp. 65-67
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Cheng, W.1
Teramoto, A.2
Gaubert, P.3
Hirayama, M.4
Ohmi, T.5
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18
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0029519226
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Excellent electro/ stress-migration-resistance suface-silicide passivated giant-grain Cu-Mg alloy interconnect technology for Giga scale integration
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T. Takewaki, R. Kaihara, T. Ohmi, and T. Nitta, "Excellent electro/ stress-migration-resistance suface-silicide passivated giant-grain Cu-Mg alloy interconnect technology for Giga scale integration," in IEDM Tech. Dig., 1995, pp. 253-256.
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(1995)
IEDM Tech. Dig
, pp. 253-256
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Takewaki, T.1
Kaihara, R.2
Ohmi, T.3
Nitta, T.4
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