Scheme for reducing the storage requirements of FFT twiddle factors on FPGAs

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 47, Issue 2, 2007, Pages 183-187

  Sansaloni, T ^a   Perez Pascual A ^a   Torres, V ^a   Valls, J ^a  

^a UNIVERSITAT POLITÈCNICA DE VALÈNCIA   (Spain)

Author keywords

Digital circuits; Digital communications; Fast fourier transform

Indexed keywords

COMPUTER HARDWARE; DIGITAL CIRCUITS; DIGITAL COMMUNICATION SYSTEMS; FAST FOURIER TRANSFORMS; RANDOM ACCESS STORAGE;

ALTERA STRATIX; DIGITAL COMMUNICATIONS; TWIDDLE FACTORS; XILINX DEVICES;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 34248229747     PISSN: 13875485     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11265-007-0055-8     Document Type: Article

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