-
1
-
-
34247567853
-
-
International Technology Roadmap for Semiconductors, Online, Available
-
International Technology Roadmap for Semiconductors, 2006. [Online]. Available: http://www.itrs.net/Links/2006Update/ 2006UpdateFinal.htm
-
(2006)
-
-
-
2
-
-
0032122783
-
Impact of self-heating and thermal coupling on analog circuits in SOI CNIOS
-
Jul
-
B. M. Tenbroek, M. S. L. Lee, W. Redman-White et al., "Impact of self-heating and thermal coupling on analog circuits in SOI CNIOS," IEEE J. Solid-State Circuits, vol. 33, no. 7, pp. 1037-1046, Jul. 1998.
-
(1998)
IEEE J. Solid-State Circuits
, vol.33
, Issue.7
, pp. 1037-1046
-
-
Tenbroek, B.M.1
Lee, M.S.L.2
Redman-White, W.3
-
3
-
-
0035310019
-
SOI thermal impedance extraction methodology and its significance for circuits simulation
-
Apr
-
W. Jin, W. Liu, S. K. H. Fung, P. C. H. Chan, and C. Hu, "SOI thermal impedance extraction methodology and its significance for circuits simulation," IEEE Trans. Electron Devices, vol. 48, no. 4, pp. 730-735, Apr. 2001.
-
(2001)
IEEE Trans. Electron Devices
, vol.48
, Issue.4
, pp. 730-735
-
-
Jin, W.1
Liu, W.2
Fung, S.K.H.3
Chan, P.C.H.4
Hu, C.5
-
4
-
-
0442326807
-
Silicon-on-nothing MOSFETs: Performance, short-channel effects, and backgate coupling
-
Feb
-
J. Pretet, S. Monfray, S. Cristoloveanu, and T. Scotnicki, "Silicon-on-nothing MOSFETs: Performance, short-channel effects, and backgate coupling," IEEE Trans. Electron. Devices, vol. 51, no. 2, pp. 240-245, Feb. 2004.
-
(2004)
IEEE Trans. Electron. Devices
, vol.51
, Issue.2
, pp. 240-245
-
-
Pretet, J.1
Monfray, S.2
Cristoloveanu, S.3
Scotnicki, T.4
-
5
-
-
84907705533
-
Substrate effect on the small-signal characteristic of SOI MOSFETs
-
Firenze, Italy, Sep
-
V. Kilchytska, D. Levacq, D. Lederer, J.-P. Raskin, and D. Flandre, "Substrate effect on the small-signal characteristic of SOI MOSFETs," in Proc. 32rd ESSDERC, Firenze, Italy, Sep. 2002, pp. 519-522.
-
(2002)
Proc. 32rd ESSDERC
, pp. 519-522
-
-
Kilchytska, V.1
Levacq, D.2
Lederer, D.3
Raskin, J.-P.4
Flandre, D.5
-
6
-
-
0042592899
-
Floating effective back-gate effect on the small-signal output conductance of SOI MOSFETs
-
Jun
-
V. Kilchytska, D. Levacq, D. Lederer, J.-P. Raskin, and D. Flandre, "Floating effective back-gate effect on the small-signal output conductance of SOI MOSFETs," IEEE Electron Device Lett., vol. 24, no. 6, pp. 414-417, Jun. 2003.
-
(2003)
IEEE Electron Device Lett
, vol.24
, Issue.6
, pp. 414-417
-
-
Kilchytska, V.1
Levacq, D.2
Lederer, D.3
Raskin, J.-P.4
Flandre, D.5
-
7
-
-
0031341419
-
Substrate crosstalk reduction using SOI technology
-
Dec
-
J.-P. Raskin, A. Viviani, D. Flandre, and J.-P. Colinge, "Substrate crosstalk reduction using SOI technology," IEEE Trans. Electron. Devices, vol. 44, no. 12, pp. 2252-2261, Dec. 1997.
-
(1997)
IEEE Trans. Electron. Devices
, vol.44
, Issue.12
, pp. 2252-2261
-
-
Raskin, J.-P.1
Viviani, A.2
Flandre, D.3
Colinge, J.-P.4
-
9
-
-
0004022746
-
-
SILVACO International
-
Atlas User's Manual, SILVACO International, 2005.
-
(2005)
Atlas User's Manual
-
-
-
10
-
-
84907692171
-
Identification of thermal and electrical time constants in SOI NIOSFETs from small signal measurements
-
Grenoble, France, Sep
-
B. M. Tenbroek, W. Redman-White, and M. J. Uren, "Identification of thermal and electrical time constants in SOI NIOSFETs from small signal measurements," in Proc. 23rd ESSDERC, Grenoble, France, Sep. 1993, pp. 189-192.
-
(1993)
Proc. 23rd ESSDERC
, pp. 189-192
-
-
Tenbroek, B.M.1
Redman-White, W.2
Uren, M.J.3
-
11
-
-
10844274144
-
Body effect in Tri- and Pi-Gate SOI MOSFETs
-
Dec
-
J. Frei et al., "Body effect in Tri- and Pi-Gate SOI MOSFETs," IEEE Electron Device Lett., vol. 25, no. 12, pp. 813-815, Dec. 2004.
-
(2004)
IEEE Electron Device Lett
, vol.25
, Issue.12
, pp. 813-815
-
-
Frei, J.1
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