An analytical drain current model for graded channel cylindrical/surrounding gate MOSFET

Microelectronics Journal

Volumn 38, Issue 3, 2007, Pages 352-359

  Kaur, Harsupreet ^a   Kabra, Sneha ^a   Haldar, Subhasis ^b   Gupta, R S ^a  

^a UNIVERSITY OF DELHI   (India)

^b UNIVERSITY OF DELHI   (India)

Author keywords

Device modeling; Drain current enhancement; Graded channel; Improved breakdown voltage; Reduced drain conductance; Surrounding gate MOSFET

Indexed keywords

COMPUTER SIMULATION; DOPING (ADDITIVES); DRAIN CURRENT; ELECTRIC POTENTIAL; IONIZATION; MATHEMATICAL MODELS;

DEVICE MODELING; DRAIN CURRENT ENHANCEMENT; GRADED CHANNEL; IMPROVED BREAKDOWN VOLTAGE; REDUCED DRAIN CONDUCTANCE; SURROUNDING GATE MOSFET;

MOSFET DEVICES;

EID: 34147162671     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mejo.2007.01.003     Document Type: Article

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