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Volumn 1, Issue , 2006, Pages

Integrated data relocation and bus reconfiguration for adaptive system-on-chip platforms

Author keywords

[No Author keywords available]

Indexed keywords

DATA ACQUISITION; MICROPROCESSOR CHIPS; NETWORK PROTOCOLS; OPTIMIZATION; REAL TIME SYSTEMS; STANDARDS;

EID: 34047141166     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2006.244091     Document Type: Conference Paper
Times cited : (2)

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    • 2542430318 scopus 로고    scopus 로고
    • Design of high-performance system-on-chips using communication architecture tuners
    • K.Lahiri, A.Raghunathan, and S.Dey, "Design of high-performance system-on-chips using communication architecture tuners," IEEE Trans. Computer-Aided Design, vol. 23, no. 6, pp. 919-932, 2004.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.