-
1
-
-
34047112427
-
Power consumption of performance-scaled SIMD processors
-
A. A. Abbo, et al. Power consumption of performance-scaled SIMD processors. In PATMOS, 2004.
-
(2004)
PATMOS
-
-
Abbo, A.A.1
-
2
-
-
33746213070
-
Predictable embedded multiprocessor system design
-
M. Bekooij, et al. Predictable embedded multiprocessor system design. In SCOPES, 2004.
-
(2004)
SCOPES
-
-
Bekooij, M.1
-
3
-
-
0036149420
-
Networks on chips: A new SoC paradigm
-
L. Benini and G. De Micheli. Networks on chips: A new SoC paradigm. IEEE Computer, 35(1):70-80, 2002.
-
(2002)
IEEE Computer
, vol.35
, Issue.1
, pp. 70-80
-
-
Benini, L.1
De Micheli, G.2
-
4
-
-
27344444925
-
A router architecture for connectionoriented service guarantees in the MANGO clockless network-on-chip
-
T. Bjerregaard and J. Sparsø. A router architecture for connectionoriented service guarantees in the MANGO clockless network-on-chip. In DATE, 2005.
-
(2005)
DATE
-
-
Bjerregaard, T.1
Sparsø, J.2
-
5
-
-
1242309790
-
QNoC: QoS architecture and design process for network on chip
-
Feb
-
E. Bolotin, et al. QNoC: QoS architecture and design process for network on chip. J. of Systems Architecture, 50(2-3), Feb. 2004.
-
(2004)
J. of Systems Architecture
, vol.50
, Issue.2-3
-
-
Bolotin, E.1
-
6
-
-
33746864910
-
-
A. Danilin, M. Bennebroek, and S. Sawitzki. A novel toolset for the development of FPGA-like reconfigurable logic. In FPL, 2005.
-
A. Danilin, M. Bennebroek, and S. Sawitzki. A novel toolset for the development of FPGA-like reconfigurable logic. In FPL, 2005.
-
-
-
-
7
-
-
14244255204
-
The Philips Nexperia digital video platform
-
G. Martin and H. Chang, editors, Kluwer Academic
-
J. A. de Oliveira and H. van Antwerpen. The Philips Nexperia digital video platform. In G. Martin and H. Chang, editors, Winning the SoC Revolution. Kluwer Academic, 2003.
-
(2003)
Winning the SoC Revolution
-
-
de Oliveira, J.A.1
van Antwerpen, H.2
-
8
-
-
34047095502
-
-
J. Dielissen, et al. Power measurements and analysis of a network on chip. Technical Note 2005/00282, Philips Research, Apr. 2005.
-
J. Dielissen, et al. Power measurements and analysis of a network on chip. Technical Note 2005/00282, Philips Research, Apr. 2005.
-
-
-
-
9
-
-
84944319385
-
Understanding video pixel processing applications for flexible implementations
-
O. P. Gangwal, et al. Understanding video pixel processing applications for flexible implementations. In Euromicro, 2003.
-
(2003)
Euromicro
-
-
Gangwal, O.P.1
-
10
-
-
33646405636
-
Building predictable systems on chip: An analysis of guaranteed communication in the Æthereal network on chip
-
P. van der Stok, editor, Dynamic and Robust Streaming In And Between Connected Consumer-Electronics Devices, of, chapter 1. Springer
-
O. P. Gangwal, et al. Building predictable systems on chip: An analysis of guaranteed communication in the Æthereal network on chip. In P. van der Stok, editor, Dynamic and Robust Streaming In And Between Connected Consumer-Electronics Devices, volume 3 of Philips Research Book Series, chapter 1. Springer, 2005.
-
(2005)
Philips Research Book Series
, vol.3
-
-
Gangwal, O.P.1
-
11
-
-
27344448207
-
A design flow for application-specific networks on chip with guaranteed performance to accelerate SOC design and verification
-
K. Goossens, et al. A design flow for application-specific networks on chip with guaranteed performance to accelerate SOC design and verification. In DATE, 2005.
-
(2005)
DATE
-
-
Goossens, K.1
-
12
-
-
27344456043
-
The Ethereal network on chip: Concepts, architectures, and implementations
-
Sept-Oct
-
K. Goossens, J. Dielissen, and A. Rǎdulescu. The Ethereal network on chip: Concepts, architectures, and implementations. IEEE Design and Test of Computers, 22(5):21-31, Sept-Oct 2005.
-
(2005)
IEEE Design and Test of Computers
, vol.22
, Issue.5
, pp. 21-31
-
-
Goossens, K.1
Dielissen, J.2
Rǎdulescu, A.3
-
13
-
-
84891434744
-
Interconnect and memory organization in SOCs for advanced set-top boxes and TV -Evolution, analysis, and trends
-
J. Nurmi, H. Tenhunen, J. Isoaho, and A. Jantsch, editors, chapter 15, Kluwer
-
K. Goossens, et al. Interconnect and memory organization in SOCs for advanced set-top boxes and TV -Evolution, analysis, and trends. In J. Nurmi, H. Tenhunen, J. Isoaho, and A. Jantsch, editors, Interconnect-Centric Design for Advanced SoC and NoC, chapter 15, pages 399-423. Kluwer, 2004.
-
(2004)
Interconnect-Centric Design for Advanced SoC and
, pp. 399-423
-
-
Goossens, K.1
-
14
-
-
27644490224
-
A unified approach to constrained mapping and routing on network-on-chip architectures
-
A. Hansson, et al. A unified approach to constrained mapping and routing on network-on-chip architectures. In CODES+ISSS, 2005.
-
(2005)
CODES+ISSS
-
-
Hansson, A.1
-
15
-
-
34047121729
-
-
T. Marescaux, et al. Interconnection networks enable fine-grain dynamic multitasking on FPGAs. FPL, 2002.
-
T. Marescaux, et al. Interconnection networks enable fine-grain dynamic multitasking on FPGAs. FPL, 2002.
-
-
-
-
16
-
-
34047123275
-
A methodology for mapping multiple use-cases on to networks on chip
-
S. Murali, et al. A methodology for mapping multiple use-cases on to networks on chip. In DATE, 2006.
-
(2006)
DATE
-
-
Murali, S.1
-
17
-
-
33746910637
-
Mapping and configuration methods for multi-usecase networks on chips
-
S. Murali, et al. Mapping and configuration methods for multi-usecase networks on chips. In ASP-DAC, 2006.
-
(2006)
ASP-DAC
-
-
Murali, S.1
-
18
-
-
33646920105
-
Centralized run-time resource management in a network-on-chip containing reconfigurable hardware tiles
-
V. Nollet, et al. Centralized run-time resource management in a network-on-chip containing reconfigurable hardware tiles. In DATE, 2005.
-
(2005)
DATE
-
-
Nollet, V.1
-
23
-
-
34047096517
-
-
Philips Semiconductors. Device Transaction Level (DTL) Protocol Specification. Version 2.2, July 2002.
-
Philips Semiconductors. Device Transaction Level (DTL) Protocol Specification. Version 2.2, July 2002.
-
-
-
-
24
-
-
0032023091
-
Processing the new world of inter-active media
-
Mar
-
S. Rathnam and G. Slavenburg. Processing the new world of inter-active media. Signal Processing Magazine, 15(2), Mar. 1998.
-
(1998)
Signal Processing Magazine
, vol.15
, Issue.2
-
-
Rathnam, S.1
Slavenburg, G.2
-
25
-
-
11844249902
-
An efficient on-chip network interface offering guaranteed services, shared-memory abstraction, and flexible network programming
-
Jan
-
A. Rǎdulescu, et al. An efficient on-chip network interface offering guaranteed services, shared-memory abstraction, and flexible network programming. IEEE Trans. on CAD of Integrated Circuits and Systems, 24(1):4-17, Jan. 2005.
-
(2005)
IEEE Trans. on CAD of Integrated Circuits and Systems
, vol.24
, Issue.1
, pp. 4-17
-
-
Rǎdulescu, A.1
|