Impact of high tunneling electric fields on erasing instabilities in NOR flash memories

IEEE Transactions on Electron Devices

Volumn 53, Issue 1, 2006, Pages 97-102

  Chimenton, Andrea ^a,b   Olivo, Piero ^b  

^a IEEE   (Italy)

^b UNIVERSITY OF FERRARA   (Italy)

Author keywords

Electric field effects; Flash memories; Semiconductor device reliability; Tunneling

Indexed keywords

CELL DEGRADATION; HOLE TRAPPING; INJECTION MECHANISM; TUNNEL OXIDES;

ANODES; DATA ACQUISITION; DATA REDUCTION; ELECTRON INJECTION; ELECTRON TUNNELING; FLASH MEMORY; THRESHOLD VOLTAGE;

ELECTRIC FIELD EFFECTS;

EID: 33947613092     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.860643     Document Type: Article

References (14)

1. A. Chimenton, P. Pellati, and P. Olivo, "Overerase phenomena: An insight into Flash memory reliability," Proc. IEEE, vol. 91, no. 4, pp. 617-626, Apr. 2003.
2. S. Yamada, T. Suzuki, E. Obi, M. Oshikiri, K. Naruke, and M. Wada, "A self-convergence erasing scheme for simple stacked gate Flash EEPROM," in IEDM Tech. Dig., 1991, pp. 307-310.
3. th -distribution of 0.5 V for low-voltage Flash memories," in Symp. VLSI Tech. Dig., 1999, pp. 33-36.
4. K. Oyama, H. Shirai, N. Kodama, K. Kanamori, K. Saitoh, Y. S. Hisamune, and T. Okazawa, "A novel erasing technology for 3.3 V Flash memory with 64 Mb capacity and beyond," in IEDM Tech. Dig., 1992, pp. 607-610.
5. A. Chimenton and P. Olivo, "Reliability of Flash memory erasing operation under high tunneling electric field," in Proc. IRPS, 2004, pp. 216-221.
6. A. Chimenton, P. Pellati, and P. Olivo, "Constant charge erasing scheme for Flash memories," IEEE Trans. Electron Devices, vol. 49, no. 4, pp. 613-618, Apr. 2002.
7. P. A. Tobias and D. C. Trindade, "The normal and lognormal distributions," in Applied Reliability. London, U.K.: Chapman&Hall/CRC, 1995, pp. 105-120.
8. Y. C. Yeo, Q. Lu, and C. Hu, "MOSFET gate oxide reliability: Anode hole injection model and its applications," Int. J. High Speed Electron. Syst., vol. 11, pp. 849-886, 2001.
9. B. Neri, P. Olivo, and B. Riccò, "Low-frequency noise in silicon-gate metal-oxide-silicon capacitors before oxide breakdown," Appl. Phys. Lett., vol. 51, no. 25, pp. 2167-2169, 1987.
10. T. C. Ong, A. Fazio, N. Mielke, S. Pan, N. Righos, G. Atwood, and S. Lai, "Erratic erase in ETOX™ Flash memory array," in Symp. VLSI Tech. Dig., 1993, pp. 83-84.
11. C. Dunn, Ç. Kaya, T. Lewis, T. Strauss, J. Schreck, P. Hefley, M. Middendorf, and T. San, "Flash EPROM disturb mechanisms," in Proc. IRPS, 1994, pp. 299-308.
12. A. Chimenton, P. Pellati, and P. Olivo, "Erratic bits in Flash memories under Fowler-Nordheim programming," Jpn. J. Appl. Phys., vol. 42, no. 4B, pp. 2041-2043, 2003.
13. A. Chimenton and P. Olivo, "Impact of tunnel oxide thickness on erratic erase in Flash memories," in Proc. Eur. Solid-State Device Conference, 2002, pp. 363-366.
14. K. Kobayashi, A. Teramoto, M. Hirayama, and Y. Fujita, "Model for the substrate hole current based on thermionic hole emission from the anode during Fowler-Nordheim electron tunneling in n-channel metal-oxide-semiconductor field-effect transistors," J. Appl. Phys., vol. 77, pp. 3277-3282, Apr. 1994.