Sampling weak-program method to tighten Vth-distribution of 0.5V for low-voltage flash memories

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1999, Pages 33-36

  Shiga, Hitoshi ^a   Tanzawa, Toru ^a   Umezawa, Akira ^a   Taura, Tadayuki ^a   Miyaba, Takeshi ^a   Saito, Masanobu ^a   Kitamura, Shota ^a   Mori, Seiichi ^a   Atsumi, Shigeru ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ELECTRIC POWER SUPPLIES TO APPARATUS; LOGIC CIRCUITS; OPTIMIZATION; THERMAL EFFECTS; TRANSISTORS; VOLTAGE CONTROL;

CELL TRANSISTOR; LINEAR REGION; LOW VOLTAGE FLASH MEMORY; SAMPLING WEAK PROGRAM METHOD;

PROM;

EID: 0033280553     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)