메뉴 건너뛰기




Volumn 53, Issue 12, 2006, Pages 1333-1337

A Multigigahertz Multimodulus Frequency Divider in 90-nm CMOS

Author keywords

90 nm bulk CMOS; CML; freauency divider; low power; multimodulus

Indexed keywords

EMITTER COUPLED LOGIC CIRCUITS; FREQUENCY DIVIDING CIRCUITS; JITTER;

EID: 33947393592     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2006.885069     Document Type: Article
Times cited : (16)

References (9)
  • 1
    • 0003457256 scopus 로고    scopus 로고
    • Techniques for high data rate modulation and low power operation of fractional-N frequency synthesizers
    • PhD. dissertation, Dep. Elect. Eng. Comp. Sci., MIT, Cambridge, Sep.
    • M. H. Perrott, “Techniques for high data rate modulation and low power operation of fractional-N frequency synthesizers, ” PhD. dissertation, Dep. Elect. Eng. Comp. Sci., MIT, Cambridge, Sep. 1997, pp. 95–100.
    • (1997) , pp. 95-100
    • Perrott, M.H.1
  • 2
    • 0034227707 scopus 로고    scopus 로고
    • A family of low-power truly modular programmable dividers in standard 0.35-pm CMOS technology
    • Jul.
    • C. S. Vaucher, I. Ferencic, M. Locher, S. Sedvallson, U. Voegeli, and Z. Wang “A family of low-power truly modular programmable dividers in standard 0.35-pm CMOS technology, ” IEEE J. Solid-State Circuits, vol. 35, no. 7, pp. 1039–1045, Jul. 2000.
    • (2000) IEEE J. Solid-State Circuits , vol.35 , Issue.7 , pp. 1039-1045
    • Vaucher, C.S.1    Ferencic, I.2    Locher, M.3    Sedvallson, S.4    Voegeli, U.5    Wang, Z.6
  • 4
    • 0242721395 scopus 로고    scopus 로고
    • Giga- programmable counter with low power consumption
    • Oct., 30
    • M. A. Do, X. P. Yu, J. G. Ma, K. S. Yeo, R. Wu, and Q. X. Zhang, “Giga- programmable counter with low power consumption, ” Electron. Lett., vol. 39, no. 22, Oct. 30, 2003.
    • (2003) Electron. Lett. , vol.39 , Issue.22
    • Do, M.A.1    Yu, X.P.2    Ma, J.G.3    Yeo, K.S.4    Wu, R.5    Zhang, Q.X.6
  • 5
    • 1242288219 scopus 로고    scopus 로고
    • A 13.5-mW 5-GHz frequency synthesizer with dynamic-logicfrequency divider
    • Feb.
    • S. Pellerano, S. Levantino, C. Samori, and A. L. Lacaita, “A 13.5-mW 5-GHz frequency synthesizer with dynamic-logicfrequency divider, ” IEEE J. Solid-State Circuits, vol. 39, no. 2, pp. 378–383, Feb. 2004.
    • (2004) IEEE J. Solid-State Circuits , vol.39 , Issue.2 , pp. 378-383
    • Pellerano, S.1    Levantino, S.2    Samori, C.3    Lacaita, A.L.4
  • 6
    • 27844438606 scopus 로고    scopus 로고
    • Design of a low-power wideband high resolution programmable frequency divider
    • Sep.
    • X. P. Yu, M. A. Do, L. Jia, J. G. Ma, and K. S. Yeo, “Design of a low-power wideband high resolution programmable frequency divider, ” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 13, no. 9, pp. 1098–1103, Sep. 2005.
    • (2005) IEEE Trans. Very Large Scale Integr. (VLSI) Syst. , vol.13 , Issue.9 , pp. 1098-1103
    • Yu, X.P.1    Do, M.A.2    Jia, L.3    Ma, J.G.4    Yeo, K.S.5
  • 7
    • 27944495694 scopus 로고    scopus 로고
    • A BiCMOS upconverter with 1.9 GHz multiband frequency synthesizer for DVB-RCT application
    • E. de Foucauld, G. Billiot, and C. Mounet, “A BiCMOS upconverter with 1.9 GHz multiband frequency synthesizer for DVB-RCT application, ” in Proc. IEEE BCTM, 2005, pp. 244–247.
    • (2005) Proc. IEEE BCTM , pp. 244-247
    • de Foucauld, E.1    Billiot, G.2    Mounet, C.3
  • 8
    • 22144478339 scopus 로고    scopus 로고
    • Fully integrated CMOS fractional-TV frequency divider for wideband mobile applications with spurs reduction
    • Jun.
    • C. C. Boon, M. A. Do, K. S. Yeo, and J. G. Ma, “Fully integrated CMOS fractional-TV frequency divider for wideband mobile applications with spurs reduction, ” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 52, no. 6, pp. 1042–1048, Jun. 2005.
    • (2005) IEEE Trans. Circuits Syst. I, Fundam. Theory Appl. , vol.52 , Issue.6 , pp. 1042-1048
    • Boon, C.C.1    Do, M.A.2    Yeo, K.S.3    Ma, J.G.4
  • 9
    • 33847233935 scopus 로고    scopus 로고
    • 2.4 GHz divide-by-256 ~271 single-ended frequency divider in standard 0.35-pm CMOS Technology
    • S.-C. Tseng, C. Meng, S.-Y. Li, J.-Y. Su, and G.-W. Huang, “2.4 GHz divide-by-256 ~271 single-ended frequency divider in standard 0.35-pm CMOS Technology, ” in Proc. APMC 2005, 2005, vol. 2, p. 4.
    • (2005) Proc. APMC 2005 , vol.2 , pp. 4
    • Tseng, S.-C.1    Meng, C.2    Li, S.-Y.3    Su, J.-Y.4    Huang, G.-W.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.