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Volumn , Issue , 2003, Pages 27-30

Evaluating application mapping using network simulation

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION MAPPING; HIGH IMPACT; NETWORK ON CHIP; NETWORK SIMULATION; NETWORK SIMULATORS; STORAGE RESOURCES;

EID: 33847226043     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (8)

References (8)
  • 1
    • 0036149420 scopus 로고    scopus 로고
    • Networks on chips: A new SoC paradigm
    • Benini, L. & De Micheli G. "Networks on chips: A new SoC paradigm", IEEE Computer, Vol. 35 No. 1, 2002, pp. 71-78.
    • (2002) IEEE Computer , vol.35 , Issue.1 , pp. 71-78
    • Benini, L.1    De Micheli, G.2
  • 3
    • 0034848112 scopus 로고    scopus 로고
    • Route packets, not wires: On-chip interconnection networks
    • Dally, W. & Towles, B., "Route packets, not wires: on-chip interconnection networks", Design Automation Conference, 2001, pp. 684-689
    • Design Automation Conference, 2001 , pp. 684-689
    • Dally, W.1    Towles, B.2
  • 7
    • 0036857007 scopus 로고    scopus 로고
    • StepNP: A system-level exploration platform for network processors
    • IEEE
    • Paulin, P.G. Pilkington, C. Bensoudane, E. "StepNP: a system-level exploration platform for network processors", Design & Test of Computers, IEEE, Volume: 19 Issue: 6, 2002, pp. 17-26
    • (2002) Design & Test of Computers , vol.19 , Issue.6 , pp. 17-26
    • Paulin, P.G.1    Pilkington, C.2    Bensoudane, E.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.