A 333MHz random cycle DRAM using the floating body cell

Proceedings of the Custom Integrated Circuits Conference

Volumn 2005, Issue , 2005, Pages 259-262

  Hatsuda, Kosuke ^a   Fujita, Katsuyuki ^a   Ohsawa, Takashi ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; EMBEDDED SYSTEMS; MONTE CARLO METHODS;

CURRENT MIRROR RATIO; FLOATING BODY CELL (FBC);

DYNAMIC RANDOM ACCESS STORAGE;

EID: 33847101893     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2005.1568656     Document Type: Conference Paper

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