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Volumn 2003-January, Issue , 2003, Pages 431-437

Automatic repositioning technique for digital cell based window comparators and implementation within mixed-signal DfT schemes

Author keywords

Automotive engineering; Circuit testing; Clocks; Costs; Design for testability; Digital integrated circuits; Proposals; Railway safety; Test equipment; Voltage

Indexed keywords

AUTOMOTIVE ENGINEERING; CLOCKS; COMPARATORS (OPTICAL); COST ENGINEERING; COSTS; DESIGN FOR TESTABILITY; DIGITAL INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; EQUIPMENT TESTING; INTEGRATED CIRCUIT TESTING; RAILROAD TRANSPORTATION; SAFETY TESTING;

EID: 33846660026     PISSN: 19483287     EISSN: 19483295     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2003.1194771     Document Type: Conference Paper
Times cited : (28)

References (11)
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    • Bias-programmable hardware reconfiguration for on-chip test response evaluation
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    • On-chip signal level evaluation for mixed-signal ICs using digital window comparators
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    • D. De Venuto, M. J. Ohletz, B. Riccò, " On-Chip Signal Level Evaluation for Mixed-Signal ICs using Digital Window Comparators", Proc. IEEE ETW01, 29 May - 1 June 2001, Stockholm, Sweden, pp. 175-179, 2001.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.