-
1
-
-
2442422056
-
Video coding with H.264/AVC: Tools, performance, and complexity
-
First Quarter
-
J. Ostermann, J. Bormans, P. List, D. Marpe, M. Narroschke, F. Pereira, T. Stockhammer, and T. Wedi, "Video coding with H.264/AVC: Tools, performance, and complexity," IEEE Circuits Syst. Mag., vol.4, no.1, pp.7-28, First Quarter 2004.
-
(2004)
IEEE Circuits Syst. Mag.
, vol.4
, Issue.1
, pp. 7-28
-
-
Ostermann, J.1
Bormans, J.2
List, P.3
Marpe, D.4
Narroschke, M.5
Pereira, F.6
Stockhammer, T.7
Wedi, T.8
-
2
-
-
0042631515
-
Overview of the H.264/AVC video coding standard
-
July
-
T. Wiegand, G.J. Sullivan, G. Bjøntegaard, and A. Luthra, "Overview of the H.264/AVC video coding standard," IEEE Trans. Circuits Syst. Video Technol., vol.13, no.7, pp.560-576, July 2003.
-
(2003)
IEEE Trans. Circuits Syst. Video Technol.
, vol.13
, Issue.7
, pp. 560-576
-
-
Wiegand, T.1
Sullivan, G.J.2
Bjøntegaard, G.3
Luthra, A.4
-
4
-
-
0033207233
-
Fast MPEG-4 motion estimation: Processor based and flexible VLSI implementations
-
Oct.
-
P.M. Kuhn, "Fast MPEG-4 motion estimation: Processor based and flexible VLSI implementations," J. VLSI Signal Processing, vol.23, no.1, pp.67-92, Oct. 1999.
-
(1999)
J. VLSI Signal Processing
, vol.23
, Issue.1
, pp. 67-92
-
-
Kuhn, P.M.1
-
5
-
-
0024753317
-
Array architectures for block matching algorithms
-
Oct.
-
T. Komarek and P. Pirsch, "Array architectures for block matching algorithms," IEEE Trans. Circuits Syst., vol.36, no.10, pp.1301-1308, Oct. 1989.
-
(1989)
IEEE Trans. Circuits Syst.
, vol.36
, Issue.10
, pp. 1301-1308
-
-
Komarek, T.1
Pirsch, P.2
-
6
-
-
0024749251
-
A VLSI architecture for real-time and flexible image template matching
-
Oct.
-
C.H. Chou and Y.C. Chen, "A VLSI architecture for real-time and flexible image template matching," IEEE Trans. Circuits Syst., vol.36, no.10, pp.1336-1342, Oct. 1989.
-
(1989)
IEEE Trans. Circuits Syst.
, vol.36
, Issue.10
, pp. 1336-1342
-
-
Chou, C.H.1
Chen, Y.C.2
-
7
-
-
4344703574
-
Low-power parallel tree architecture for full search block-matching motion estimation
-
May
-
S.S. Lin, P.C. Tseng, and L.G. Chen, "Low-power parallel tree architecture for full search block-matching motion estimation," ISCAS'04. Proc. 2004 International Symposium on Circuits and Systems, pp.313-316, May 2004.
-
(2004)
ISCAS'04. Proc. 2004 International Symposium on Circuits and Systems
, pp. 313-316
-
-
Lin, S.S.1
Tseng, P.C.2
Chen, L.G.3
-
8
-
-
0027543616
-
An efficient and simple VLSI tree architecture for motion estimation algorithms
-
Feb.
-
Y.S. Jehng, L.G. Chen, and T.D. Chiueh, "An efficient and simple VLSI tree architecture for motion estimation algorithms," IEEE Trans. Signal Process., vol.41, no.2, pp.889-900, Feb. 1993.
-
(1993)
IEEE Trans. Signal Process.
, vol.41
, Issue.2
, pp. 889-900
-
-
Jehng, Y.S.1
Chen, L.G.2
Chiueh, T.D.3
-
9
-
-
0038421877
-
Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264
-
May
-
Y.W. Huang, T.C. Wang, B.Y. Hsieh, and L.G. Chen, "Hardware architecture design for variable block size motion estimation in MPEG-4 AVC/JVT/ITU-T H.264," ISCAS'03. Proc. 2003 International Symposium on Circuits and Systems, pp.796-799, May 2003.
-
(2003)
ISCAS'03. Proc. 2003 International Symposium on Circuits and Systems
, pp. 796-799
-
-
Huang, Y.W.1
Wang, T.C.2
Hsieh, B.Y.3
Chen, L.G.4
-
10
-
-
84861444464
-
A fast VLSI architecture for full-search variable block size motion estimation in MPEG-4 AVC/H.264
-
Jan.
-
M. Kim, I. Hwang, and S.I. Chae, "A fast VLSI architecture for full-search variable block size motion estimation in MPEG-4 AVC/H.264," Asia and South Pacific Design Automation Conference, 2005. Proc. ASP-DAC 2005, pp.631-634, Jan. 2005.
-
(2005)
Asia and South Pacific Design Automation Conference, 2005. Proc. ASP-DAC 2005
, pp. 631-634
-
-
Kim, M.1
Hwang, I.2
Chae, S.I.3
-
11
-
-
3543021496
-
A VLSI architecture for variable block size video motion estimation
-
July
-
S.Y. Yap and J.V. McCanny, "A VLSI architecture for variable block size video motion estimation," IEEE Trans. Circuits Syst. II, Express Briefs, vol.51, no.7, pp.384-389, July 2004.
-
(2004)
IEEE Trans. Circuits Syst. II, Express Briefs
, vol.51
, Issue.7
, pp. 384-389
-
-
Yap, S.Y.1
McCanny, J.V.2
-
12
-
-
33646244730
-
Scalable VLSI architecture for variable block size integer motion estimation in H.264/AVC
-
April
-
Y. Song, Z.Y. Liu, S. Goto, and T. Ikenaga, "Scalable VLSI architecture for variable block size integer motion estimation in H.264/AVC," IEICE Trans. Fundamentals, vol.E89-A, no.4, pp.979-988, April 2006.
-
(2006)
IEICE Trans. Fundamentals
, vol.E89-A
, Issue.4
, pp. 979-988
-
-
Song, Y.1
Liu, Z.Y.2
Goto, S.3
Ikenaga, T.4
-
13
-
-
0036216763
-
On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture
-
Jan.
-
J.C. Tuan, T.S. Chang, and C.W. Jen, "On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture," IEEE Trans. Circuits Syst. Video Technol., vol.12, no.1, pp.61-72, Jan. 2002.
-
(2002)
IEEE Trans. Circuits Syst. Video Technol.
, vol.12
, Issue.1
, pp. 61-72
-
-
Tuan, J.C.1
Chang, T.S.2
Jen, C.W.3
|