The effect of thermal shocks on the stresses in a sapphire wafer

IEEE Transactions on Semiconductor Manufacturing

Volumn 19, Issue 4, 2006, Pages 449-453

  Vodenitcharova, T ^a   Zhang, L C ^a   Zarudi, I ^a   Yin, Y ^a   Domyo, H ^b   Ho, T ^b  

^a UNIVERSITY OF SYDNEY   (Australia)

^b Peregrine Semiconductor   (United States)

Author keywords

Sapphire; Thermal shock; Wafer

Indexed keywords

COOLING; DEFORMATION; FINITE ELEMENT METHOD; SAPPHIRE; TENSILE STRESS; THERMAL EFFECTS;

FURNACE TEMPERATURE; SAPPHIRE WAFERS; THERMAL SHOCK;

SHOCK WAVES;

EID: 33751505504     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/TSM.2006.883591     Document Type: Conference Paper

References (13)

1. [Online]. Available: http://americas.kyocera.com/kicc/semiconductor/ crystal.html
2. [Online]. Available: www.peregrine-semi.com.au
3. T. A. Badgwell, T. F. Edgar, I. Trachtenberg, G. Yetter, and J. K. Elliot, "In situ measurements of wafer temperatures in a low pressure chemical vapor deposition furnace," IEEE Trans. Semicond. Manuf., vol. 6, no. 1, pp. 65-71, Feb. 1993.
4. M. Itsumi and J. Kai, "Four types and origins of transient si wafer deformation with furnace insertion and withdrawal," Jpn. J. Appl. Phys., vol. 32, pp. 5468-5472, 1993.
5. _, "In situ observation system for silicon wafer transient deformation during insertion/withdrawal into/from horizontal furnaces," J. Electrochemistry Soc., vol. 141, pp. 1299-1303, 1994.
6. Y. -H. Fan and T. Qiu, "Analyses of thermal stresses and control schemes for fast temperature ramps of batch furnaces," IEEE Trans. Semicond. Manuf., vol. 10, no. 4, pp. 433-437, Nov. 1997.
7. J. P. Hebb and K. F. Jensen, "The effect of patterns on thermal stress during rapid thermal processing of silicon wafers," IEEE Trans. Semicond. Manuf., vol. 11, no. 1, pp. 99-107, Feb. 1998.
8. H. A. Lord, "Thermal and stress analysis of semiconductor wafers in a rapid thermal processing oven," IEEE Trans. Semiconduct. Manuf., vol. 1, no. 1, pp. 105-114, Feb. 1988.
9. A. M. Sharan, D. Dhar, and R. Seshadri, "Heat transfer/thermal stress analysis of semiconductors under transient conditions," Modelling Simul. Mater. Sci. Eng., vol. 5, pp. 245-258, 1997.
10. C. -K. C. Chao, "Thermal stress analysis for rapid thermal processor," IEEE Trans. Semicond. Manuf., vol. 16, no. 3, pp. 335-341, Aug. 2003.
11. C. M. Tan, Z. Gan, and X. Gao, "Temperature and stress distribution in the SOI structure during fabrication," IEEE Trans. Semicond. Manuf., vol. 16, no. 3, pp. 314-318, Aug. 2003.
12. T. Vodenitcharova, L. C. Zhang, I. Zarudi, Y. Yin, H. Domyo, and T. Ho, "Transient thermal analysis of sapphire wafers subjected to thermal shocks," IEEE Trans. Semicond. Manuf., vol. 19, no. 3, pp. 292-297, 2006.
13. Y. -H. Fan and T. Qui, "Transient heat transfer in batch thermal reactors for silicon wafer processing," Int. J. Heat Mass Transfer, vol. 41, pp. 1549-1557, 1998.