Rapid resource-constrained hardware performance estimation

Proceedings of the International Workshop on Rapid System Prototyping

Volumn 2006, Issue , 2006, Pages 40-46

  Dwivedi, Basant K ^a   Balakrishnan, M ^b   Kejariwal, Arun ^c   Kumar, Anshul ^b  

^a Calypto Design Systems   (United States)

^b INDIAN INSTITUTE OF TECHNOLOGY DELHI   (India)

^c 5226 Donald Bren Hall   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; FILE ORGANIZATION; SOFTWARE ENGINEERING;

CLOCK PERIOD ESTIMATION; HARDWARE ESTIMATION; HIGH-LEVEL SYNTHESIS (HLS);

COMPUTER HARDWARE;

EID: 33751430470     PISSN: 10746005     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RSP.2006.33     Document Type: Conference Paper

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