A unified lower bound estimation technique for high-level synthesis

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 16, Issue 5, 1997, Pages 458-472

  Ohm, Seong Yong ^a   Kurdahi, Fadi J ^b   Dutt, Nikil D ^b  

^a Seoul Women University   (South Korea)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; ELECTRIC NETWORK SYNTHESIS; MULTIPLYING CIRCUITS; RESOURCE ALLOCATION; SHIFT REGISTERS;

HIGH LEVEL SYNTHESIS (HLS); LOWER BOUND ESTIMATION (LBE) TECHNIQUES;

INTEGRATED CIRCUIT LAYOUT;

EID: 0031147547     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.631209     Document Type: Article

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