Leakage Biased pMOS Sleep Switch Dynamic Circuits

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 53, Issue 10, 2006, Pages 1093-1097

  Liu, Zhiyu ^a   Kursun, Volkan ^a  

^a University of Wisconsin Madison   (United States)

Author keywords

Domino logic; dual threshold voltage; gate oxide tunneling; sleep mode; subthreshold leakage current

Indexed keywords

ELECTRIC INVERTERS; GATES (TRANSISTOR); LEAKAGE CURRENTS; MOSFET DEVICES; SWITCHING CIRCUITS; THRESHOLD VOLTAGE;

DOMINO LOGIC CIRCUITS; DUAL THRESHOLD VOLTAGE; GATE-OXIDE TUNNELING; SLEEP MODE;

LOGIC CIRCUITS;

EID: 33750588894     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2006.882206     Document Type: Article

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