Node voltage dependent subthreshold leakage current characteristics of dynamic circuits

Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004

Volumn , Issue , 2004, Pages 104-109

  Kursun, Volkan ^a   Friedman, Eby G ^a  

^a University of Rochester   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC INVERTERS; ELECTRIC POWER UTILIZATION; LOGIC CIRCUITS; SPURIOUS SIGNAL NOISE; THRESHOLD VOLTAGE; TRANSISTORS;

DOMINO LOGIC CIRCUITS; DYNAMIC CIRCUITS; NODE VOLTAGE; NOISE IMMUNITY;

LEAKAGE CURRENTS;

EID: 2942683261     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2004.1283658     Document Type: Conference Paper

References (9)

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2. S. Dropsho, V. Kursun, S. Dwarkadas, D. H. Albonesi, and E. G. Friedman, "Managing Static Leakage Energy in Microprocessor Functional Units," Proceedings of the IEEE/ACM International Symposium on Microarchitecture, pp. 321-332, November 2002.
3. J. Kao, "Dual Threshold Voltage Domino Logic," Proceedings of the European Solid-State Circuits Conference, pp. 118-121, September 1999.
4. M. W. Allam, M. H. Anis, and M. I. Elmasry, "High-Speed Dynamic Logic Styles for Scaled-Down CMOS and MTCMOS Technologies," Proceedings of the IEEE International Symposium on Low Power Electronics and Design, pp. 155-160, July 2000.
5. S. Heo and K. Asanovic, "Leakage-Biased Domino Circuits for Dynamic Fine-Grain Leakage Reduction," Proceedings of the IEEE International Symposium on VLSI Circuits, pp. 316-319, June 2002.
6. V. Kursun and E. G. Friedman, "Sleep Switch Dual Threshold Voltage Domino Logic with Reduced Standby Leakage Current," IEEE Transactions on Very Large Scale Integration (VLSI) Systems (in press).
7. Y. Ye, S. Borkar, and V. De, "A New Technique for Standby Leakage Reduction in High-Performance Circuits," Proceedings of the IEEE International Symposium on VLSI Circuits, pp. 40-41, June 1998.
8. A. Alvandpour, R. K. Krishnamurthy, K. Soumyanath, and S. Y. Borkar, "A Sub-130-nm Conditional Keeper Technique," IEEE Journal of Solid-State Circuits, Vol. 37, No. 5, pp. 633-638, May 2002.
9. V. Kursun and E. G. Friedman, "Low Swing Dual Threshold Voltage Domino Logic," Proceedings of the ACM/SIGDA Great Lakes Symposium on VLSI, pp. 47-52, April 2002.