A low-power asymmetric source driver level converter based current-mode signaling scheme for global interconnects

Proceedings of the IEEE International Conference on VLSI Design

Volumn 2006, Issue , 2006, Pages 491-494

  Narasimhan, Ashok ^a   Srinivasaraghavan, Bhooma ^a   Sridhar, Ramalingam ^a  

^a State University of New York   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GLOBAL INTERCONNECTS; SIGNAL INTEGRITY; SYSTEM-ON-CHIPS (SOC); VERY DEEP SUBMICRON (VDSM);

COMPUTER SIMULATION; EMBEDDED SYSTEMS; MICROPROCESSOR CHIPS; NOISE GENERATORS; SIGNAL PROCESSING;

INTERCONNECTION NETWORKS;

EID: 33748524869     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSID.2006.16     Document Type: Conference Paper

References (11)

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