A low-swing differential signaling scheme for on-chip global interconnects

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2005, Pages 634-639

  Narasimhan, Ashok ^a   Kasotiya, Manish ^a   Sridhar, Ramalingam ^a  

^a State University of New York   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

NOISE IMMUNITY; SIGNAL INTEGRITY; SYSTEMS ON CHIPS (SOC); VERY DEEP SUBMICRON (VDSM);

COMPUTER SIMULATION; ELECTRIC POTENTIAL; SIGNAL PROCESSING; SPURIOUS SIGNAL NOISE;

MICROPROCESSOR CHIPS;

EID: 27944449657     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICVD.2005.19     Document Type: Conference Paper

References (13)

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