A current direction sense technique for multiport SRAM's

IEEE Journal of Solid-State Circuits

Volumn 31, Issue 4, 1996, Pages 546-551

  Izumikawa, Masanori ^a,b,c,d   Yamashina, Masakazu ^a  

^a IEEE

^b NEC CORPORATION   (Japan)

^c OSAKA UNIVERSITY   (Japan)

^d JAPAN SOCIETY OF APPLIED PHYSICS   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIFFERENTIAL AMPLIFIERS; ELECTRIC CURRENTS; ELECTRIC INVERTERS; INTEGRATED CIRCUIT MANUFACTURE; MOSFET DEVICES;

BIT LINE SWING CONTROL CIRCUIT; CURRENT DIRECTION SENSE CIRCUIT; MEMORY CELL REPLICA;

RANDOM ACCESS STORAGE;

EID: 0030121501     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.499731     Document Type: Article

References (4)

1. S. Shinagawa et al., "A multi-speed digital cross-connected switching VLSI using new circuit techniques in dual port RAMs," in IEEE CICC, 3.4.1-4, 1991.
2. M. Izumikawa et al., "A current direction sense technique for multiport SRAMs," in Symp. VLSI Circuits Dig. Tech. Papers, June 1995, pp. 23-24.
3. E. Seevinck et al., "Current-mode techniques for high-speed VLSI circuits with application to current sense amplifier for CMOS SRAM's," IEEE J. Solid-State Circuits, vol. 26, no. 4, pp. 525-536, Apr. 1991.
4. E. Seevinck et al., "Static-noise margin analysis of MOS SRAM cells," IEEE J. Solid-State Circuits, vol. 22, no. 5, pp. 748-754, Oct. 1987.