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Volumn 2005, Issue , 2005, Pages 373-380

Methods for modeling resource contention on simultaneous multithreading processors

Author keywords

[No Author keywords available]

Indexed keywords

OPERATING SYSTEM SCHEDULING; PENTIUM-4 HYPER-THREADING PROCESSORS; RECURSIVE PARTITIONING; REGRESSION MODELS; SIMULTANEOUS MULTITHREADING (SMT);

EID: 33748519552     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2005.74     Document Type: Conference Paper
Times cited : (28)

References (24)
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    • An introduction to recursive partitioning
    • Mayo Foundation, Feb
    • E. J. Atkinson and T. M. Therneau. An introduction to recursive partitioning. Technical report, Mayo Foundation, Feb 2000.
    • (2000) Technical Report
    • Atkinson, E.J.1    Therneau, T.M.2
  • 7
    • 27544512320 scopus 로고    scopus 로고
    • Using interaction costs for microarchitectural bottleneck analysis
    • B. A. Fields, R. Bodik, M. D. Hill, and C. J. Newburn. Using interaction costs for microarchitectural bottleneck analysis. In MICRO, pages 228-242, 2003.
    • (2003) MICRO , pp. 228-242
    • Fields, B.A.1    Bodik, R.2    Hill, M.D.3    Newburn, C.J.4
  • 9
    • 21244457025 scopus 로고    scopus 로고
    • Special issue on intel hyperthreading in pentium-4 processors
    • January
    • Intel Corporation. Special issue on intel hyperthreading in pentium-4 processors. Intel Technology Journal, 1(1), January 2002.
    • (2002) Intel Technology Journal , vol.1 , Issue.1
  • 10
    • 33646346832 scopus 로고    scopus 로고
    • The microarchitecture of the intel pentium-4 processor on 90nm technology
    • February
    • Intel Corporation. The microarchitecture of the intel pentium-4 processor on 90nm technology. Intel Technology Journal, 1(1), February 2004.
    • (2004) Intel Technology Journal , vol.1 , Issue.1
  • 11
    • 3042669130 scopus 로고    scopus 로고
    • Ibm power5 chip: A dual-core multithreaded processor
    • R. N. Kalla, B. Sinharoy, and J. M. Tendlr. Ibm power5 chip: A dual-core multithreaded processor. IEEE Micro, 24(2):40-47, 2004.
    • (2004) IEEE Micro , vol.24 , Issue.2 , pp. 40-47
    • Kalla, R.N.1    Sinharoy, B.2    Tendlr, J.M.3
  • 14
    • 0033348795 scopus 로고    scopus 로고
    • A chip-multiprocessor architecture with speculative multithreading
    • V. Krishnan and J. Torrellas. A chip-multiprocessor architecture with speculative multithreading. IEEE Transactions on Computers, 48(9):866-880, 1999.
    • (1999) IEEE Transactions on Computers , vol.48 , Issue.9 , pp. 866-880
    • Krishnan, V.1    Torrellas, J.2
  • 18
    • 1842607847 scopus 로고    scopus 로고
    • R Development Core Team. R Foundation for Statistical Computing, Vienna, Austria, 3-900051-07-0
    • R Development Core Team. R: A language and environment for statistical computing. R Foundation for Statistical Computing, Vienna, Austria, 2004. 3-900051-07-0.
    • (2004) R: A Language and Environment for Statistical Computing


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.