New fabrication technique using side-wall-type plasma-enhanced chemical-vapor deposition for a floating gate memory with a Si nanodot

Journal of the Korean Physical Society

Volumn 49, Issue 2, 2006, Pages 569-576

  Ichikawa, Kazunori ^a   Punchaipetch, Prakaipetch ^a   Yano, Hiroshi ^a   Hatayama, Tomoaki ^a   Uraoka, Yukiharu ^a   Fuyuki, Takashi ^a   Tomyo, Atsushi ^b   Takahashi, Eiji ^b   Hayashi, Tsukasa ^b   Ogata, Kiyoshi ^b  

^a NARA INSTITUTE OF SCIENCE AND TECHNOLOGY   (Japan)

^b NISSIN ELECTRIC CO LTD   (Japan)

Author keywords

Floating gate; MOSFET; Plasma enhanced chemical vapor deposition; Quantum effect; Si nanocrystalline dot

Indexed keywords

EID: 33748040057     PISSN: 03744884     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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