Low dead time, multi-hit FPGA-based time-to-digital converter

4th International IEEE North-East Workshop on Circuits and Systems, NEWCAS 2006 - Conference Proceedings

Volumn , Issue , 2006, Pages 29-32

  Amiri, Amir Mohammad ^a   Boukadoum, Mounir ^b   Khouas, Abdelhakim ^a  

^a ÉCOLE POLYTECHNIQUE DE MONTRÉAL   (Canada)

^b UNIVERSITÉ DU QUÉBEC À MONTRÉAL   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

DATA PROCESSING; MATRIX ALGEBRA; OPTIMIZATION; TOPOLOGY;

MATRIX TAP LINES; MATRIX TOPOLOGY; TIME-TO-DIGITAL CONVERTER (TDC);

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 33747080292     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NEWCAS.2006.250905     Document Type: Conference Paper

References (9)

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