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Volumn 27, Issue 8, 2006, Pages 665-667

Demonstration of short-channel self-aligned Pt2Si-FUSI pMOSFETs with low threshold voltage (-0.29 V) on SiON and HfSiON

Author keywords

Full silicidation (FUSI); HfSiON dielectric; High k; Metal gate; Ni31Si12; NiSi; Pt2Si; PtSi; SiON dielectric; Threshold voltage; Work function

Indexed keywords

ELECTRIC CHARGE; GATES (TRANSISTOR); PERMITTIVITY; SEMICONDUCTING SILICON COMPOUNDS; THRESHOLD VOLTAGE;

EID: 33746517461     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2006.878051     Document Type: Article
Times cited : (4)

References (12)
  • 4
    • 21644466972 scopus 로고    scopus 로고
    • "Dual work function Ni-silicide/HfSiON gate stacks by phase-controlled fullsilicidation (PC-FUSI) technique for 45 nm-node LSTP and LOP devices"
    • K. Takahashi, K. Manabe, T. Ikarashi, N. Ikarashi, T. Hase, T. Yoshihara, H. Watanabe, T. Tatsumi, and Y. Mochizuki, "Dual work function Ni-silicide/HfSiON gate stacks by phase-controlled fullsilicidation (PC-FUSI) technique for 45 nm-node LSTP and LOP devices," in IEDM Tech. Dig., 2004, pp. 91-94.
    • (2004) IEDM Tech. Dig. , pp. 91-94
    • Takahashi, K.1    Manabe, K.2    Ikarashi, T.3    Ikarashi, N.4    Hase, T.5    Yoshihara, T.6    Watanabe, H.7    Tatsumi, T.8    Mochizuki, Y.9
  • 7
    • 27744536796 scopus 로고    scopus 로고
    • χSi metal gate for high work function and reduced Fermi-level pinning"
    • Nov
    • χSi metal gate for high work function and reduced Fermi-level pinning," IEEE Electron Device Lett., vol. 26, no. 11, pp. 796-798, Nov. 2005.
    • (2005) IEEE Electron Device Lett. , vol.26 , Issue.11 , pp. 796-798
    • Park, C.S.1    Cho, B.J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.