Design-Driven metrology: A new paradigm for DFM-enabled process characterization and control: Extensibility and limitations

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6152 I, Issue , 2006, Pages

  Capodieci, Luigi ^a  

^a ADVANCED MICRO DEVICES   (United States)

Author keywords

Design Based Metrology; Design For Manufacturing; Design Driven Metrology; Metrology Automation; Optical Proximity Correction; Resolution Enhancement Techniques

Indexed keywords

COMPUTER AIDED DESIGN; CONTROL THEORY; DATA FLOW ANALYSIS; INTEGRATED CIRCUIT LAYOUT; LITHOGRAPHY; SEMICONDUCTOR MATERIALS;

DESIGN FOR MANUFACTURING; DESIGN-DRIVEN METROLOGY; METROLOGY AUTOMATION; OPTICAL PROXIMITY CORRECTION; RESOLUTION ENHANCEMENT TECHNIQUES;

MEASUREMENT THEORY;

EID: 33745603172     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.659181     Document Type: Conference Paper

References (13)

1. Thomas S. Kuhn, The Structure of Scientific Revolutions, University of Chicago Press, 1962.
2. Alfred Wong, Resolution Enhancement Techniques in Optical Lithography, SPIE Press, 2001.
3. J. Stirniman and M. Rieger, Fast Proximity Correction with Zone Sampling, Proc. SPIE Vol. 2197, 1994
4. Y. Pati, A. Ganzafarian, R.F.W. Pease, Exploiting structure in fast aerial image computation for IC Patterns IEEE Trans. Semiconductor Manufacturing 10(1), 1995
5. N. Cobb, A Zakhor, E. Miloslavsky, Mathematical and CAD framework for Proximity Correction, Proc. SPIE Vol. 2726, 1996
6. C. E. Tabery, L. Capodieci, C. A. Haidinyak, K. Shah, M. Threefoot, B. Singh, B. Choo, Y. Nehmadi, C. Ofek, O. Menadeva, A. Ben-Porath, Design Based Metrology: Advanced Automation for CD-SEM recipe generation, Proc. SPIE Vol. 5852, 2005
7. C. E. Tabery and L. Page, Use of Design Pattern Layout for Automatic Metrology Recipe Generation, Proc. SPIE Vol. 5752, 2005
8. D. Stoler, G. Lorusso, L. Capodieci, et al., Advanced DFM applications using Design-Based Metrology on CD SEM, to be published in Proc. SPIE Vol. 6152, 2006
9. C. E. Tabery, H. Morokuma, L. Page, Evaluation of OPC quality using automated Edge Placement Error measurement with CD-SEM, to be published in Proc. SPIE Vol. 6152, 2006
10. J. Yang, L. Capodieci, D. Sylvester, Advanced Timing Analysis Based on post-OPC Patterning Process Simulations, Proc. SPIE Vol. 5756, 2005.
11. J. Yang, L. Capodieci, D. Sylvester, Advanced timing analysis based on post-OPC extraction of critical dimensions, Proc. ACM, DAC 2005.
12. W. J. Poppe, L. Capodieci, J. J. Wu, From poly line to transistor: building BSIM models for non-rectangular transistors, to be published in Proc. SPIE Vol. 6156, 2006
13. Frank Gennari, Andrew R. Neureuther, A Pattern Matching System for Linking TCAD and EDA, ISQED 2004.