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Volumn 2005, Issue , 2005, Pages 337-340

A novel register organization for VLIW digital signal processors

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATION; SOCIETIES AND INSTITUTIONS; VLSI CIRCUITS;

EID: 33745446678     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VDAT.2005.1500090     Document Type: Conference Paper
Times cited : (7)

References (17)
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    • (2003) Proc. ISCA , pp. 62-71
    • Tseng, J.H.1    Asanovic, K.2
  • 3
    • 0032639289 scopus 로고    scopus 로고
    • The Alpha 21264 microprocessor
    • Mar.-Apr.
    • R. E. Kessler, "The Alpha 21264 microprocessor," IEEE Micro, vol.19, pp.24-36, Mar.-Apr.1999
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    • Kessler, R.E.1
  • 5
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    • Hierarchical clustered register file organization for VLIW processors
    • J. Zalamea, J. Llosa, E. Ayguade, and M. Valero, "Hierarchical clustered register file organization for VLIW processors," in Proc. IPDPS, 2003, pp.77-86
    • (2003) Proc. IPDPS , pp. 77-86
    • Zalamea, J.1    Llosa, J.2    Ayguade, E.3    Valero, M.4
  • 9
    • 33745459599 scopus 로고    scopus 로고
    • "Copied register files for data processors having many execution units" U.S. Patent 6 629 232, Sep. 30
    • K. Arora, H. Sharangpani, and R. Gupta, "Copied register files for data processors having many execution units" U.S. Patent 6 629 232, Sep. 30, 2003
    • (2003)
    • Arora, K.1    Sharangpani, H.2    Gupta, R.3
  • 10
    • 6644227176 scopus 로고    scopus 로고
    • The first MAJC microprocessor: A dual CPU system-on-a-chip
    • Nov.
    • A. Kowalczyk et al., "The first MAJC microprocessor: a dual CPU system-on-a-chip," IEEE J. Solid-State Circuits, vol. 36, pp.1609-1616, Nov. 2001
    • (2001) IEEE J. Solid-state Circuits , vol.36 , pp. 1609-1616
    • Kowalczyk, A.1
  • 11
    • 33745473627 scopus 로고    scopus 로고
    • Performance evaluation of ring-structure register file in multimedia applications
    • T. J. Lin, et al., "Performance evaluation of ring-structure register file in multimedia applications," in Proc. ICME, 2003, pp.121-124
    • (2003) Proc. ICME , pp. 121-124
    • Lin, T.J.1
  • 14
    • 85032751343 scopus 로고    scopus 로고
    • High-performance dual-MAC DSP architecture
    • July
    • R. K. Kolagotla, et al, "High-performance dual-MAC DSP architecture," IEEE Signal Processing Mag., pp.42-53, July 2002
    • (2002) IEEE Signal Processing Mag. , pp. 42-53
    • Kolagotla, R.K.1
  • 15
    • 0026984988 scopus 로고
    • Register traffic analysis for streamlining inter-operation communication in fine-grain parallel processors
    • M. Franklin and G. S. Sohi, "Register traffic analysis for streamlining inter-operation communication in fine-grain parallel processors," in Proc. MICRO-25, 1992, pp.23 6-245
    • (1992) Proc. MICRO-25 , pp. 236-245
    • Franklin, M.1    Sohi, G.S.2
  • 16
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    • Reducing register ports for higher speed and lower energy
    • I. Park, M. D. Powell, and T. N. Vijaykumar, "Reducing register ports for higher speed and lower energy," in Proc. MICRO-35, 2002, pp.171-182
    • (2002) Proc. MICRO-35 , pp. 171-182
    • Park, I.1    Powell, M.D.2    Vijaykumar, T.N.3
  • 17
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    • The energy complexity of register files
    • V. Zyuban and P. Kogge, "The energy complexity of register files," in Proc. ISLPED, 1998, pp.305-310
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    • Zyuban, V.1    Kogge, P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.