-
1
-
-
21144436184
-
Compiling for the Molen Programming Paradigm
-
13th International Conference on Field Programmable Logic and Applications (FPL). Lisbon, Portugal
-
Moscu Panainte, E., Bertels, K., Vassiliadis, S.: Compiling for the Molen Programming Paradigm. In: 13th International Conference on Field Programmable Logic and Applications (FPL). Volume 2778., Lisbon, Portugal, Springer-Verlag Lecture Notes in Computer Science (LNCS) (2003) 900-910
-
(2003)
Springer-Verlag Lecture Notes in Computer Science (LNCS)
, vol.2778
, pp. 900-910
-
-
Moscu Panainte, E.1
Bertels, K.2
Vassiliadis, S.3
-
2
-
-
8744284139
-
The Molen Programming Paradigm
-
Samos, Greece
-
Vassiliadis, S., Gaydadjiev, G., Bertels, K., Moscu Panainte, E.: The Molen Programming Paradigm. In: Proceedings of the Third International Workshop on Systems, Architectures, Modeling, and Simulation, Samos, Greece (2003) 1-7
-
(2003)
Proceedings of the Third International Workshop on Systems, Architectures, Modeling, and Simulation
, pp. 1-7
-
-
Vassiliadis, S.1
Gaydadjiev, G.2
Bertels, K.3
Moscu Panainte, E.4
-
3
-
-
84949189232
-
The MOLEN ρμ-Coded Processor
-
11th International Conference on Field Programmable Logic and Applications (FPL). Belfast, UK
-
Vassiliadia, S., Wong, S., Cotofana, S.: The MOLEN ρμ-Coded Processor. In: 11th International Conference on Field Programmable Logic and Applications (FPL). Volume 2147., Belfast, UK, Springer-Verlag Lecture Notes in Computer Science (LNCS) (2001) 275-285
-
(2001)
Springer-Verlag Lecture Notes in Computer Science (LNCS)
, vol.2147
, pp. 275-285
-
-
Vassiliadia, S.1
Wong, S.2
Cotofana, S.3
-
4
-
-
79955133514
-
Field-Programmable Custom Computing Machines - A Taxonomy
-
12th International Conference on Field Programmable Logic and Applications (FPL). Montpellier, France
-
Sima, M., Vassiliadis, S., S.Cotofana, van Eijndhoven, J., Vissers, K.: Field-Programmable Custom Computing Machines - A Taxonomy. In: 12th International Conference on Field Programmable Logic and Applications (FPL). Volume 2438., Montpellier, France, Springer-Verlag Lecture Notes in Computer Science (LNCS) (2002) 79-88
-
(2002)
Springer-Verlag Lecture Notes in Computer Science (LNCS)
, vol.2438
, pp. 79-88
-
-
Sima, M.1
Vassiliadis, S.2
Cotofana, S.3
Van Eijndhoven, J.4
Vissers, K.5
-
5
-
-
84947257755
-
A reconfigurable processor architecture and software development environment for embedded systems
-
Nice, France
-
Campi, F., Cappelli, A., Guerrieri, R., Lodi, A., Toma, M., Rosa, A.L., Lavagno, L., Passerone, C.: A reconfigurable processor architecture and software development environment for embedded systems. In: Proceedings of Parallel and Distributed Processing Symposium, Nice, France (2003) 171-178
-
(2003)
Proceedings of Parallel and Distributed Processing Symposium
, pp. 171-178
-
-
Campi, F.1
Cappelli, A.2
Guerrieri, R.3
Lodi, A.4
Toma, M.5
Rosa, A.L.6
Lavagno, L.7
Passerone, C.8
-
6
-
-
0033488529
-
Concise: A compiler-driven cpld-based instruction set accelerator
-
Napa Valley CA
-
Kastrup, B., Bink, A., Hoogerbrugge, J.: Concise: A compiler-driven cpld-based instruction set accelerator. In: Proceedings of FCCM'99, Napa Valley CA (1999) 92-100
-
(1999)
Proceedings of FCCM'99
, pp. 92-100
-
-
Kastrup, B.1
Bink, A.2
Hoogerbrugge, J.3
-
7
-
-
14244251751
-
Hardware/Software Design Space Exploration for a Reconfigurable Processor
-
Munich, Germany
-
Rosa, A.L., Lavagno, L., Passerone, C.: Hardware/Software Design Space Exploration for a Reconfigurable Processor. In: Proc. of DATE 2003, Munich, Germany (2003) 570-575
-
(2003)
Proc. of DATE 2003
, pp. 570-575
-
-
Rosa, A.L.1
Lavagno, L.2
Passerone, C.3
-
8
-
-
0033906636
-
Design and Implementation of the MorphoSys Reconfigurable Computing Processor
-
Lee, M.H., Singh, H., Lu, G., Bagherzadeh, N., Kurdahi, F.J.: Design and Implementation of the MorphoSys Reconfigurable Computing Processor. VLSI Signal Processing Systems 24 (2000) 147-164
-
(2000)
VLSI Signal Processing Systems
, vol.24
, pp. 147-164
-
-
Lee, M.H.1
Singh, H.2
Lu, G.3
Bagherzadeh, N.4
Kurdahi, F.J.5
-
9
-
-
3042610031
-
System Design using Kahn Process Networks: The Compaan/Laura Approach
-
Paris, France
-
Stefanov, T., Zissulescu, C., Turjan, A., Kienhuis, B., Deprettere, E.: System Design using Kahn Process Networks: The Compaan/Laura Approach. In: Proc. of DATE 2004, Paris, France (2004) 340-345
-
(2004)
Proc. of DATE 2004
, pp. 340-345
-
-
Stefanov, T.1
Zissulescu, C.2
Turjan, A.3
Kienhuis, B.4
Deprettere, E.5
-
10
-
-
85013607448
-
Napa C: Compiling for a Hybrid RISC/FPGA Architecture
-
Napa Valley, CA
-
Gokhale, M.B., Stone, J.M.: Napa C: Compiling for a Hybrid RISC/FPGA Architecture. In: Proceedings of FCCM'98, Napa Valley, CA (1998) 126-137
-
(1998)
Proceedings of FCCM'98
, pp. 126-137
-
-
Gokhale, M.B.1
Stone, J.M.2
-
11
-
-
0033718671
-
A C Compiler for a Processor with a Reconfigurable Functional Unit
-
Monterey, California, USA
-
Ye, Z.A., Shenoy, N., Banerjee, P.: A C Compiler for a Processor with a Reconfigurable Functional Unit. In: ACM/SIGDA Symposium on FPGAs, Monterey, California, USA (2000) 95-100
-
(2000)
ACM/SIGDA Symposium on FPGAs
, pp. 95-100
-
-
Ye, Z.A.1
Shenoy, N.2
Banerjee, P.3
-
12
-
-
35048830096
-
Unifying FPGAs and SIMD arrays
-
Berkeley, CA
-
M. Bolotski, A. DeHon, Knight, J.T.F.: Unifying FPGAs and SIMD arrays. In: ACM/SIGDA Symposium on FPGAs, Berkeley, CA (1994) 1-10
-
(1994)
ACM/SIGDA Symposium on FPGAs
, pp. 1-10
-
-
Bolotski, M.1
DeHon, A.2
Knight, J.T.F.3
-
13
-
-
35048867196
-
-
(http://suif.stanford.edu/suif/suif2)
-
-
-
-
14
-
-
35048828163
-
-
(http://www.eecs.hardvard.edu/hube/research/machsuif.html)
-
-
-
-
15
-
-
35248845643
-
Arbitrating Instructions in an ρμ-coded CCM
-
Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL'03) Lisbon, Portugal
-
Kuzmanov, G., Vassiliadis, S.: Arbitrating Instructions in an ρμ-coded CCM. In: Proceedings of the 13th International Conference on Field Programmable Logic and Applications (FPL'03). Volume 2778., Lisbon, Portugal, Springer-Verlag Lecture Notes in Computer Science (LNCS) (2003) 81-90
-
(2003)
Springer-Verlag Lecture Notes in Computer Science (LNCS)
, vol.2778
, pp. 81-90
-
-
Kuzmanov, G.1
Vassiliadis, S.2
-
16
-
-
0033734481
-
Compaan: Deriving Process Networks from Matlab for Embedded Signal Processing Architectures
-
San Diego, CA
-
Kienhuis, B., Rijpkema, E., Deprettere, E.: Compaan: Deriving Process Networks from Matlab for Embedded Signal Processing Architectures. In: Proc. of CODES'2000, San Diego, CA (2000) 13-17
-
(2000)
Proc. of CODES'2000
, pp. 13-17
-
-
Kienhuis, B.1
Rijpkema, E.2
Deprettere, E.3
-
17
-
-
35248901052
-
Laura: Leiden Architecture Research and Exploration Tool
-
13th International Conference on Field Programmable Logic and Applications (FPL). Lisbon, Portugal
-
Zissulescu, C., Stefanov, T., Kienhuis, B., Deprettere, E.: Laura: Leiden Architecture Research and Exploration Tool. In: 13th International Conference on Field Programmable Logic and Applications (FPL). Volume 2778., Lisbon, Portugal, Springer-Verlag Lecture Notes in Computer Science (LNCS) (2003) 911-920
-
(2003)
Springer-Verlag Lecture Notes in Computer Science (LNCS)
, vol.2778
, pp. 911-920
-
-
Zissulescu, C.1
Stefanov, T.2
Kienhuis, B.3
Deprettere, E.4
-
18
-
-
35048846881
-
-
(http://www.xilinx.com/ise_eval/index.htm)
-
-
-
-
19
-
-
35048862147
-
-
(http://www.xilinx.com/ise/embedded/edk.htm)
-
-
-
|