On the scaling limit of ultrathin SOI MOSFETs

IEEE Transactions on Electron Devices

Volumn 53, Issue 5, 2006, Pages 1137-1141

  Lu, Wei Yuan ^a   Taur, Yuan ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Buried oxide (BOX) thickness; Lateral field analysis; Short channel effect (SCE); Silicon on insulator (SOI) MOSFET

Indexed keywords

COMPUTER SIMULATION; GATES (TRANSISTOR); SEMICONDUCTOR DEVICES; SILICON ON INSULATOR TECHNOLOGY;

BURIED OXIDE THICKNESS; LATERAL FIELD ANALYSIS; THIN GATE INSULATOR;

MOSFET DEVICES;

EID: 33646046842     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2006.871879     Document Type: Article

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