MOSFET mismatch modeling: A new approach

IEEE Design and Test of Computers

Volumn 23, Issue 1, 2006, Pages 20-29

  Klimach, Hamilton ^a   Galup Montoro, Carlos ^b   Schneider, Márcio C ^b   Arnaud, Alfredo ^c  

^a FEDERAL UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

^b FEDERAL UNIVERSITY OF SANTA CATARINA   (Brazil)

^c UNIVERSITY OF URUGUAY   (Uruguay)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DESIGN FOR TESTABILITY; MATHEMATICAL MODELS; SYSTEMS ANALYSIS; TRANSISTORS;

HANDLING COMPONENT MISMATCH; SUBMICRON TECHNOLOGIES; SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN (SBCCI); TRANSISTOR MISMATCH;

MOSFET DEVICES;

EID: 32144438124     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2006.20     Document Type: Article

References (14)

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