Dynamics and performance analysis of analog iterative decoding for low-density parity-check (LDPC) codes

IEEE Transactions on Communications

Volumn 54, Issue 1, 2006, Pages 61-70

  Hemati, Saied ^a,b   Banihashemi, Amir H ^a  

^a CARLETON UNIVERSITY   (Canada)

^b UNIVERSITY OF OTTAWA   (Canada)

Author keywords

Analog decoding; Asynchronous iterative methods; Belief propagation (BP); Dynamics of iterative decoding; Iterative decoding; Low density parity check (LDPC) codes; Min sum (MS); Successive relaxation (SR); Successive substitution (SS); Sum product

Indexed keywords

ALGORITHMS; APPROXIMATION THEORY; CODES (SYMBOLS); COMPUTER SIMULATION; DIFFERENTIAL EQUATIONS; ITERATIVE METHODS; MATHEMATICAL MODELS;

ANALOG DECODING; ASYNCHRONOUS ITERATIVE METHODS; BELIEF PROPAGATION (BP); DYNAMICS OF ITERATIVE DECODING; ITERATIVE DECODING; LOW-DENSITY PARITY-CHECK (LDPC) CODES; SUCCESSIVE RELAXATION (SR); SUCCESSIVE SUBSTITUTION (SS); SUM-PRODUCT;

DECODING;

EID: 31344477228     PISSN: 00906778     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCOMM.2005.861668     Document Type: Article

References (32)

1. J. Hagenauer, E. Offer, C. Méasson, and M. Mörz, "Decoding and equalization with analog nonlinear networks," Eur. Trans. Telecommun., vol. 10, pp. 659-680, Nov./Dec. 1999.
2. J. Hagenauer, M. Moerz, and E. Offer, "Analog turbo networks in VLSI: The next step in turbo decoding and equalization," in Proc. Int. Symp. Turbo Codes, ENST, Bretagne, France, 2000, pp. 209-218.
3. M. Moerz, T. Gabara, R. Yan, and J. Hagenauer, "An analog 0.25-μm BiCMOS tailbiting MAP decoder," in Proc. IEEE Solid-State Circuits Conf., San Francisco, CA, Feb. 2000, pp. 356-357.
4. H.-A. Loeliger, F. Lustenberger, M. Helfenstein, and F. Tarköy, "Probability propagation and decoding in analog VLSI," IEEE Trans. Inf. Theory, vol. 47, no. 2, pp. 837-843, Feb. 2001.
5. A. F. Mondragón-Torres, E. Sánchez-Sinencio, and K. R. Narayanan, "Floating-gate analog implementation of the additive soft-input soft-output decoding algorithm," IEEE Trans. Circuits Syst. I, vol. 50, no. 10, pp. 1256-1269, Oct. 2003.
6. V. C. Gaudet and P. G. Gulak, "A 13.3-Mb/s 0.35-μm CMOS analog turbo decoder IC with a configurable interleaver," IEEE J. Solid-State Circuits, vol. 38, no. 11, pp. 2010-2015, Nov. 2003.
7. S. Hemati and A. H. Banihashemi, "Full CMOS min-sum analog iterative decoder," in Proc. IEEE Int. Symp. Inf. Theory, 2003, p. 347.
8. S. Hemati and A. H. Banihashemi, "Iterative decoding in analog CMOS," in Proc. 13th ACM Great Lakes Symp. VLSI, Washington, DC, 2003, pp. 15-20.
9. C. Winstead, J. Dai, S. Yu, C. Myers, R. R. Harrison, and C. Schlegel, "CMOS analog MAP decoder for (8,4) Hamming code," IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 122-131, Jan. 2004.
10. D. Vogrig, A. Gerosa, A. Neviani, A. G. i. Amat, G. Montorsi, and S. Benedetto, "A 0.35-μm CMOS analog turbo decoder for the 40-bit rate 1/3 UMTS channel code," IEEE J. Solid-State Circuits, vol. 40, no. 3, pp. 753-762, Mar. 2005.
11. M. Arzel, C. Lahuec, M. Jézéquel, and F. Seguin, "Analogue decoding of duo-binary codes," in Proc. Int. Symp. Inf. Theory Appl., Parma, Italy, Oct. 2004, pp. 10-13.
12. C. Mead, Analog VLSI and Neural Systems. Reading, MA: Addison-Wesley, 1989.
13. N. Wiberg, Codes and decoding on general graphs. Linköping, Sweden: Linköping Univ., 1996.
14. J. M. Ortega and W. C. Rheinboldt, Iterative Solution of Nonlinear Equations in Several Variables. New York: Academic, 1970.
15. D. M. Young and R. T. Gregory, A Survey of Numerical Mathematics. Reading, MA: Addison-Wesley, 1973, Series in Mathematics.
16. C. T. Kelley, Iterative Methods for Linear and Nonlinear Equations. Philadelphia, PA: SIAM, 1995.
17. T. Richardson, "The geometry of turbo-decoding dynamics," IEEE Trans. Inf. Theory, vol. 46, no. 1, pp. 9-23, Jan. 2000.
18. P. Moqvist and T. M. Aulin, "Turbo-decoding as a numerical analysis problem," in Proc. IEEE Int. Symp. Inf. Theory, 2000, p. 485.
19. J. Chen and M. P. C. Fossorier, "Near-optimum universal belief-propagation-based decoding of low-density parity-check codes," IEEE Trans. Commun., vol. 50, no. 3, pp. 406-414, Mar. 2002.
20. J. Chen and M. P. C. Fossorier, "Density evolution for two improved BP-based decoding algorithms of LDPC codes," IEEE Commun. Lett., vol. 6, no. 5, pp. 208-210, May 2002.
21. M. R. Yazdani, S. Hemati, and A. H. Banihashemi, "Improving belief propagation on graphs with cycles," IEEE Commun. Lett., vol. 8, no. 1, pp. 57-59, Jan. 2004.
22. J. Zhao, F. Zarkeshvari, and A. H. Banihashemi, "On implementation of min-sum algorithm and its modifications for decoding LDPC codes," IEEE Trans. Commun., vol. 53, no. 4, pp. 549-554, Apr. 2005.
23. R. M. Tanner, "A recursive approach to low-complexity codes," IEEE Trans. Inf. Theory, vol. IT-27, no. 9, pp. 533-547, Sep. 1981.
24. J. M. Rabaey, A. Chandrakasan, and B. Nikolic, Digital Integrated Circuits, A Design Perspective, 2nd ed. Englewood Cliffs, NJ: Prentice-Hall, 2003.
25. J. D. Lambert, Numerical Methods for Ordinary Differential Systems. The Initial Value Problem. New York: Wiley, 1973.
26. G. Dahlquist, "A special stability problem for linear multistep methods," J. BIT Numer. Math., vol. 3, pp. 27-43, 1963.
27. S. Hemati and A. H. Banihashemi, "Full CMOS Min-Sum Analog Iterative Decoder," U.S. Patent (Pending), Application 10/832806, Apr. 27, 2004.
28. Y. Mao and A. H. Banihashemi, "A heuristic search for good low-density parity-check codes at short block lengths," in Proc. IEEE Int. Conf. Commun., 2001, pp. 41-44.
29. D. J. MacKay. Encyclopedia of Sparse Graph Codes. [Online]. Available: http://www.inference.phy.cam.ac.uk/mackay/codes/data.html.
30. A. J. Blanksby and C. J. Howland, "A 690-mW 1 Gb/s 1024-b rate-1/2 low-density parity-check code decoder," IEEE J. Solid-State Circuits, vol. 37, no. 3, pp. 404-412, Mar. 2002.
31. M. P. C. Fossorier, "Iterative reliability-based decoding of low-density parity-check code," IEEE J. Sel. Areas Commun., vol. 19, no. 5, pp. 908-917, May 2001.
32. M. P. C. Fossorier, Private Communication, Univ. Hawaii at Manoa, Dept. Elect. Eng., Honolulu, HI, May 2003.