A heuristic search for good low-density parity-check codes at short block lengths

IEEE International Conference on Communications

Volumn 1, Issue , 2001, Pages 41-44

  Mao, Y ^a   Banihasherni, A H ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BIT ERROR RATE; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; DECODING; HEURISTIC METHODS; ITERATIVE METHODS; PHASE SHIFT KEYING; SIGNAL TO NOISE RATIO;

LOW-DENSITY PARITY-CHECK (LPDC) CODES;

BLOCK CODES;

EID: 0034865418     PISSN: 05361486     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. Low Density Parity Check Codes
2. Design of provably good low density parity check codes
3. Near Shannon limit performance of low density parity check codes
4. Good error correcting codes based on very sparse matrices
5. Comparison of constructions of irregular Gallager codes
6. The capacity of low density parity check codes under message-passing decoding
7. Comparison between low-density parity-check codes and turbo product codes for delay and complexity sensitive applications
8. Primer: Turbo product codes