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Volumn , Issue , 2005, Pages 192-195

A 60 mW per Lane, 4 × 23-Gb/s 27 - 1 PRBS Generator

Author keywords

BiCMOS cascode; BiCMOS CML; PRBS generator

Indexed keywords

CMOS INTEGRATED CIRCUITS; TOPOLOGY;

EID: 30944434244     PISSN: 15508781     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CSICS.2005.1531808     Document Type: Conference Paper
Times cited : (6)

References (9)
  • 2
    • 0242696126 scopus 로고    scopus 로고
    • 45-Gb/s SiGe BiCMOS PRBS generator and PRBS cthecker
    • S. Kim, et al., "45-Gb/s SiGe BiCMOS PRBS Generator and PRBS Checker," in CICC 2003, pp. 313-316.
    • CICC 2003 , pp. 313-316
    • Kim, S.1
  • 3
    • 33749523503 scopus 로고    scopus 로고
    • Algorithmic design methodologies and design porting of wireline transceiver IC building blocks between technology nodes
    • accepted
    • S. P. Voinigescu, et al., "Algorithmic Design Methodologies and Design Porting of Wireline Transceiver IC Building Blocks between Technology Nodes," in CICC 2005, accepted.
    • CICC 2005
    • Voinigescu, S.P.1
  • 4
    • 0018021058 scopus 로고
    • Shift-register connections for delayed versions of m-sequences
    • Oct.
    • A. N. Van Luyn, "Shift-Register Connections for Delayed Versions of m-Sequences," Electronics Letters, vol.14, no. 22, pp. 713-715, Oct. 1978.
    • (1978) Electronics Letters , vol.14 , Issue.22 , pp. 713-715
    • Van Luyn, A.N.1
  • 5
    • 18744416335 scopus 로고    scopus 로고
    • A 2.5-V 45-Gb/s decision circuit using SiGe BiCMOS logic
    • Apr.
    • T. Dickson, et al., "A 2.5-V 45-Gb/s decision circuit using SiGe BiCMOS logic," in IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 994-1003, Apr. 2005.
    • (2005) IEEE J. Solid-State Circuits , vol.40 , Issue.4 , pp. 994-1003
    • Dickson, T.1
  • 6
    • 0346935199 scopus 로고    scopus 로고
    • 1.5-V low supply voltage 43-Gb/s delayed flip-flop circuit
    • Y. Amamiya, et al., "1.5-V Low Supply Voltage 43-Gb/s Delayed Flip-Flop Circuit," in 2003 IEEE GaAs Digest, pp. 169-172.
    • (2003) IEEE GaAs Digest , pp. 169-172
    • Amamiya, Y.1
  • 8
    • 28144454462 scopus 로고    scopus 로고
    • 40Gb/s 4:1 MUX/1:4 DEMUX in 90nm Standard CMOS
    • K. Kanda, et al., "40Gb/s 4:1 MUX/1:4 DEMUX in 90nm Standard CMOS," in 2005 IEEE ISSCC Digest of Technical Papers, pp. 152-153.
    • (2005) IEEE ISSCC Digest of Technical Papers , pp. 152-153
    • Kanda, K.1
  • 9
    • 20144388719 scopus 로고    scopus 로고
    • 230 GHz self-aligned SiGeC HBT for 90 nm BiCMOS technology
    • P. Chevalier, et al., "230 GHz self-aligned SiGeC HBT for 90 nm BiCMOS technology," in Proceedings of IEEE BCTM 2004, pp 225-228.
    • (2004) Proceedings of IEEE BCTM , pp. 225-228
    • Chevalier, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.