45-Gb/s SiGe BiCMOS PRBS generator and PRBS checker

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2003, Pages 313-316

  Kim, Seongwon ^a   Kapur, Mohit ^a   Meghelli, Mounir ^a   Rylyakov, Alexander ^a   Kwark, Young ^a   Friedman, Daniel ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; BIT ERROR RATE; ELECTRIC POWER SUPPLIES TO APPARATUS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT MANUFACTURE; LOGIC GATES; POLYNOMIALS; SEMICONDUCTING SILICON COMPOUNDS; SIGNAL GENERATORS;

BIT ERROR RATE TESTER; PATTERN GENERATOR CIRCUIT; PSEUDORANDOM BIT SEQUENCE CHECKER; PSEUDORANDOM BIT SEQUENCE GENERATOR;

CMOS INTEGRATED CIRCUITS;

EID: 0242696126     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. M. Bubmann, U. Langmann, W. Hillery, and W. Brown, "A 12.5 Gb/s Si Bipolar IC for PRBS Generation and Bit Error Detection Up to 25Gb/s," IEEE J. of Solid-State Circuits, vol. 28, no.12, pp. 1303-1309, Dec. 1993.
2. H. Knapp, M. Wurzer, T/ Meister, J. Bock, K. Aufinger, "40 Gbit/s 27-2 PRBS Generator IC in SiGe Bipolar Technology," IEEE Proc. BCTM, pp. 124-127, 2002.
3. M. Chen and J. Notthoff, "A 3.3-V 21-Gb/s PRBS Generator in AlGaAs/GaAs HBT Technology," IEEE J. of Solid-State Circuits, vol. 35, no. 9, pp. 1266-1270, Sept. 2000.
4. O. Komat, U. Langmann, G. Hanke, and W. Hillery, "A 10-Gb/s silicon bipolar IC for PRBS testing," IEEE J. of Solid-State Circuits, vol. 33, pp.76-85, Jan. 1998.
5. A. Joseph, D. Coolbaugh, M. Zierak, R. Wuthrich, P. Geiss, Z. He, X. Liu, B. et al., "A 0.1mm BiCMOS Technology Feating 120/100GHz (fT/fmax) HBT and ASIC-Compatible CMOS Using Copper Interconnect," IEEE Proc. BCTM, pp. 143-146, 2001.
6. J. J. O'Reilly, "Series-parallel generation of m-sequences," Radio Electron, Eng., no. 4, pp. 171-176, Apr. 1975.
7. W. McFarland, K. Springer, and C. Yen, "1-Gword/s Pseudorandom Word Generator," IEEE J. Solid-State Circuits, vol. 24, no. 3, pp. 747-751, June 1989.
8. H.-M. Rein, and M. Moller, "Design Considerations for Very-High-Speed Si-Bipolar ICs Operating up to 50Gb/s," IEEE J. Solid-State Circuits, vol. 31, pp.101090, August 1996.
9. R. Westcott, "Testing digital datatransmission systems," U.K. Patent 1 281 390, 1972.
10. R. G. Swartz, "Ultra-High Speed Multiplexer/Demultiplexer Architectures," International J. Of High Speed Electronics, Vol. 1, No. 1, pp. 73-99, 1990.