Stress-induced voiding in multi-level copper/low-k interconnects

Annual Proceedings - Reliability Physics (Symposium)

Volumn , Issue , 2004, Pages 240-245

  Lim, Y K ^a,b   Lim, Y H ^a   Seet, C S ^a   Zhang, B C ^a   Chok, K L ^a   See, K H ^a   Lee, T J ^a   Hsia, L C ^a   Pey, K L ^b  

^a CHARTERED SEMICONDUCTOR MANUFACTURING LTD   (Singapore)

^b NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Cu; Diffusion barrier layer; Dual via interconnect; Low k; Multi level; Pull back; Re sputtering; Stress migration; Stress induced voiding

Indexed keywords

DIFFUSION BARRIER LAYERS; DUAL VIA INTERCONNECT; LOW K; MULTI LEVEL; PULL BACK; RE-SUPTTERING; STRESS INDUCED VOIDING; STRESS MIGRATION;

CHEMICAL MECHANICAL POLISHING; COPPER COMPOUNDS; DIFFUSION; ELECTROMIGRATION; ETCHING; PHYSICAL VAPOR DEPOSITION; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; STRESS ANALYSIS; TRANSMISSION ELECTRON MICROSCOPY;

INTERCONNECTION NETWORKS;

EID: 3042613250     PISSN: 00999512     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. G. Deltoro, and N. Sharif, "Copper Interconnect: Migration Or Bust", IEEE/CPMT International Electronics Manufacturing Technology Symposium, 1999, pp.1-13.
2. J.R. Lloyd, J. Clements, R. Snede, "Copper Metallization Reliability", Microelectronic Reliability, 1999, pp.1595-1602.
3. B.L. Park, S.R. Hah, C.G. Park, D.K. Jeong, H.S. Son, H.S. Oh, J.H. Chung, J.L. Nam, K.M. Park, and J.D. Byun, "Mechanisms Of Stress-Induced Voids In Multi-Level Cu Interconnects", International Interconnect Technology Conference, 2002, pp.130-132.
4. K. Ishikawa, T. Iwasaki, T. Fujii, N. Nakajima, M. Miyauchi, T. Ohshima, J. Noguchi, H. Aoki and T. Saito, "Impact of Metal Deposition Process Upon Reliability of Dual-Damascene Interconnects", International Interconnect Technology Conference, 2003, pp 24-26.
5. G.B. Alers, R.T. Rozbicki, G.J. Harm, S.K. Kailasam, G.W. Ray, and M. Danek, "Barrier-First Integration for Improved Reliability In Copper Dual Damascene Interconnects", International Interconnect Technology Conference, 2003, pp. 27-29.
6. E.T. Ogawa, J.W. McPherson, J.A. Rosal, K.J. Dickerson, T.C. Chiu, L.Y. Tsung, M.K. Jain, T.D. Bonfield, J.C. Ondrusek, and W. R. Mckee, "Stress-Induced Voiding Under Via Connected to Wide Cu Metal Leads", International Reliability Physics Symposium, 2002, pp.312-321.
7. A.H. Fisher, A.V. Glasow, S. Penka, and F. Ungar, "Process Optimization - The Key To Obtain Highly Reliable Cu Interconnects", International Interconnect Technology Conference, 2003, pp.253-255.
8. S.H. Lau, S. Huang, and A. Koo, "Characterize Low-k and Copper Films In-Situ", Semiconductor International, 2000, pp.239-244.
9. S.H. Lau, Ellie Tolentino, Y. Lim, Evangeline Tolentino, and A. Koo, "Advanced Metrology for Rapid Characterization of The Thermal Mechanical Properties Of Low-k Dielectric And Cu Thin Films", Journal of Electronic Materials, Vol. 30, No. 4, 2001, pp.299-303.
10. J.J. Liu, D.W. Gan, C. Hu, M. Kiene, and P.S. Ho, "Porosity Effect On The Dielectric Constant And Thermomechanical Properties: Of Organosilicate Films", Applied Physics Letters, Vol. 81, No. 22, 2002, pp. 4180-4182.
11. S.H. Rhee, Y. Du, and P.S. Ho, "Thermal Stress Characteristics Of Cu/Oxide And Cu/Low-k Submicron Interconnect Structures", Journal of Applied Physics, Vol.93, No.7, 2003, pp.3926-3933.