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Volumn 23, Issue 6, 2004, Pages 968-980

TCG-S: Orthogonal coupling of P*-admissible representations for general floorplans

Author keywords

Floorplanning; Layout; Physical_design; Transitive_closure_graph

Indexed keywords

BENCHMARKING; COMPUTER AIDED DESIGN; CONSTRAINT THEORY; FLOORS; GRAPH THEORY; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; MATRIX ALGEBRA; OPTIMIZATION; POLYNOMIALS;

EID: 2942546060     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.828114     Document Type: Article
Times cited : (46)

References (19)
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    • (1999) Proc. Design Automation Conf. , pp. 268-273
    • Guo, P.-N.1    Cheng, C.-K.2    Yoshimura, T.3
  • 6
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    • May
    • S. Kirkpatrick, C. D. Gelatt, and M. P. Vecchi, "Optimization by simulated annealing," Science, vol. 220, no. 4598, pp. 671-680, May 1983
    • (1983) Science , vol.220 , Issue.4598 , pp. 671-680
    • Kirkpatrick, S.1    Gelatt, C.D.2    Vecchi, M.P.3
  • 9
    • 0034855935 scopus 로고    scopus 로고
    • TCG: A transitive closure graph-based representation for nonslicing floorplans
    • J.-M. Lin and Y.-W. Chang, "TCG: A transitive closure graph-based representation for nonslicing floorplans," in Proc. Design Automation Conf., 2001, pp. 764-769.
    • (2001) Proc. Design Automation Conf. , pp. 764-769
    • Lin, J.-M.1    Chang, Y.-W.2
  • 10
    • 0036051250 scopus 로고    scopus 로고
    • TCG-S: Orthogonal coupling of P*-admissible representations for general floorplans
    • _, "TCG-S: Orthogonal coupling of P*-admissible representations for general floorplans," in Proc. Design Automation Conf., 2002, pp. 842-847.
    • (2002) Proc. Design Automation Conf. , pp. 842-847
  • 11
    • 2942574332 scopus 로고    scopus 로고
    • TCG: A transitive closure graph-based representation for general floorplans
    • _, "TCG: A transitive closure graph-based representation for general floorplans," IEEE Trans. VLSI Syst., 2003.
    • (2003) IEEE Trans. VLSI Syst.
  • 17
    • 0033704928 scopus 로고    scopus 로고
    • An enhanced perturbing algorithm for floorplan design using the O-tree representation
    • Y. Pang, C. K. Cheng, and T. Yoshimura, "An enhanced perturbing algorithm for floorplan design using the O-tree representation," in Proc. Int. Symp. Phys. Design, 2000, pp. 168-173.
    • (2000) Proc. Int. Symp. Phys. Design , pp. 168-173
    • Pang, Y.1    Cheng, C.K.2    Yoshimura, T.3
  • 18
    • 84949784966 scopus 로고    scopus 로고
    • FAST-SP: A fast algorithm for block placement based on sequence pair
    • X. Tang and D. F. Wong, "FAST-SP: A fast algorithm for block placement based on sequence pair," in Proc. Asia South Pacific-Design Automation Conf., 2001, pp. 521-526.
    • (2001) Proc. Asia South Pacific-design Automation Conf. , pp. 521-526
    • Tang, X.1    Wong, D.F.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.