Module placement with boundary constraints using the sequence-pair representation

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 2001-January, Issue , 2001, Pages 515-520

  Lai, Jianbang ^a   Lin, Ming Shiun ^a   Wang, Ting Chi ^b   Wang, L C ^c  

^a CHUNG YUAN CHRISTIAN UNIVERSITY   (Taiwan)

^b TEXAS A AND M UNIVERSITY   (United States)

^c University of California   (United States)

Author keywords

Algorithm design and analysis; Computational modeling; Cost function; Design methodology; Routing; Simulated annealing; Stochastic processes; Topology; Very large scale integration; Wire

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; COST FUNCTIONS; RANDOM PROCESSES; SIMULATED ANNEALING; STOCHASTIC SYSTEMS; TOPOLOGY; VLSI CIRCUITS; WIRE;

ALGORITHM DESIGN AND ANALYSIS; BOUNDARY CONSTRAINTS; COMPUTATIONAL MODEL; DESIGN METHODOLOGY; MODULE PLACEMENT; ROUTING; SEQUENCE PAIR;

DESIGN;

EID: 84949810913     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2001.913360     Document Type: Conference Paper

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