Digital implementation of a wavelet-based event detector for cardiac pacemakers

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 52, Issue 12, 2005, Pages 2686-2698

  Rodrigues, Joachim Neves ^a   Olsson, Thomas ^a,b   Sörnmo, Leif ^a   Öwall, Viktor ^a  

^a LUND UNIVERSITY   (Sweden)

^b ERICSSON RESEARCH   (Sweden)

Author keywords

Cardiac pacemaker; Event detector; Gated supply; Sleep transistors; Wavelet filter

Indexed keywords

ALGORITHMS; CARDIOLOGY; CARDIOVASCULAR SYSTEM; CMOS INTEGRATED CIRCUITS; DIGITAL CIRCUITS; OPTIMIZATION; PACEMAKERS; SIGNAL TO NOISE RATIO; TRANSFER FUNCTIONS;

CARDIAC PACEMAKER; EVENT DETECTOR; GATED SUPPLY; SLEEP TRANSISTORS; WAVELET FILTER;

DETECTOR CIRCUITS;

EID: 29344474929     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2005.857925     Document Type: Article

References (43)

1. O. Pahlm and L. Sörnmo, "Software QRS detection in ambulatory monitoring - A review," Med. Biol. Eng. Comput., vol. 22, pp. 289-297, 1984.
2. G. Friesen, T. Jannett, M. Jadallah, S. Yates, S. Quint, and H. Nagle, "A comparison of the noise sensitivity of nine QRS detection algorithms," IEEE Trans. Biomed. Eng., no. 1, pp. 85-98, Jan. 1990.
3. B.-U. Köhler, C. Hennig, and R. Orglmeister, "The principles of QRS detection," IEEE Eng. Med. Biol. Mag., vol. 21, no. 1, pp, 42-57, Jan./Feb. 2002.
4. J. Webster, Design of Cardiac Pacemakers. New York: IEEE Press, 1995.
5. A. Gerosa and A. Neviani, "A very low-power 8-bit Σ Δ converter in a 0.8-μm CMOS technology for the sensing chain of a cardiac pacemaker, operating down to 1.8 V," in Proc. IEEE Int. Symp. Circuits Systems, vol. 5, May 2003, pp. 52-59.
6. S. A. P. Haddad, N. Verwaal, R. Houben, and W. A. Serdijn, "Optimized dynamic translinear implementation of the Gaussian wavelet transform," in Proc. IEEE Int. Symp. Circuits Systems, vol. 1, May 2004, pp. 145-148.
7. J. Jenkins and S. Caswell, "Detection algorithms in implantable cardioverter defibrillators," Proc. IEEE, vol. 84, no. 3, pp. 428-445, Mar. 1996.
8. R. Coggins and M. Jabri, "A low-complexity intracardiac electrogram compression algorithm," IEEE Trans. Biomed. Eng., vol. 46, no. 1, pp. 82-91, Jan. 1999.
9. A. Auricchio, W. Hartung, C. Geller, and H. Klein, "Clinical relevance of stored electrograms for implantable cardioverter-defibrillator (ICD) troubleshooting and understanding of mechanisms for ventricular tachyarrhythmias," Amer. J. Cardiol., vol. 78, pp. 33-41, Sep. 1996.
10. B. Nowak, "Taking advantage of sophisticated pacemaker diagnosis," Amer. J. Cardiol., vol. 83, pp. 172-179, Mar. 1999.
11. S. Cio, Fundamentals of Statistical Signal Processing: Detection Theory, 2nd ed. Upper Saddle River, NJ: Prentice Hall, 1998, vol. 2.
12. J. N. Rodrigues, V. Öwall, and L. Sörnmo, "A wavelet-based R-wave detector for cardiac pacemakers in 0.35 CMOS technology," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 4, May 2004, pp. 13-16.
13. J. N. Rodrigues, V. Öwall, and L. Sörnmo, "A flexible wavelet filter structure for cardiac pacemakers: A power efficient implementation," in Proc. IEEE Int. Symp. Biomed. Circuits and Systems, vol. 4, Nov. 2004, pp. S1/2/5-s112/8.
14. t for leakage reduction," in Proc. IEEE Int. Symp. Circuits and Systems, May 2005, pp. 1330-1333.
15. M. Åström, S. Olmos, and L. Sörnmo, "Wavelet-based event detection in implantable cardiac rhythm managment devices," IEEE Trans. Biomed. Eng., to be published.
16. t low-leakage gated-ground cache for deep submicron," IEEE J. Solid-State Circuits, vol. 38, no. 2, pp. 319-328, Feb. 2003.
17. S. Mukhopadhyay, C. Neigh, R. Cakici, A. Agarwal, C. Kim, and K. Roy, "Gate leakage reduction for scaled devices using transistor stacking," IEEE Trans. Very Large Scale (VLSI) Syst., vol. 11, no. 4, pp. 716-730, Aug. 2003.
18. S. Narendra, V. De, S. Borkar, D. Antoniadis, and A. Chandrakasan, "Full-chip subtreshold leakage power predcition and reduction techniques for sub-0.18-μm cmos," IEEE J. Solid-State Circuits, vol. 39, no. 3, pp. 501-510, Mar. 2004.
19. C. Long and L. He, "Distributed sleep transistor network for power reduction," IEEE Trans. Very Large Scale (VLSI) Syst., vol. 12, pp. 937-946, Sep. 2004.
20. E. Berbari, Encyclopaedia of Electrical Electronic Engingeering: Electrocardiography. New York: Wiley, 1999.
21. E. Berbari, J. Dyer, P. Lander, and D. Geselowitz, "Simulation of intracardiac electrograms with a moving dipole source. Role of electrode geometry and high-pass filtering," J. Electrocard., vol. 27, pp. 146-150, 1994.
22. W. Irnich, "Intracardiac electrograms and sensing test signals: Electrophysiological, physical and technical considerations," PACE, vol. 8, pp. 870-888, Nov./Dec. 1985.
23. G. Myers, Y. Kresh, and V. Parsonnet, "Characteristics of intercardiac electrograms," PACE, vol. 1, pp. 90-103, Jan.-Apr. 1978.
24. W. Irnich, "Interference in pacemakers," PACE, vol. 7, pp. 1021-1048, Nov./Dec. 1984.
25. M. Åström, "Detection and Classification in Electrocardiac Signals," Ph.D. thesis, Lund University, Lund, Sweden, May 2003.
26. S. Mallat, A Wavelet Tour of Signal Processing. San Diego, CA: Academic Press, 1998.
27. B. Moberg and H. Strandberg, "Effects of interference on pacemakers," Eur. J. Pace, Cardiol. Electrophys., vol. 5, pp. 146-157, 1995.
28. W. Irnich, "Muscle noise and interference behavior in pacemakers: A comparative study," PACE, vol. 10, pp. 125-132, 1987.
29. B. Dodinot, J.-P. Godenir, and A. Costa, "Electronic article surveillance: A possible danger for pacemaker patients," PACE, vol. 16, pp. 46-53, 1993.
30. E. Lucas, "The effect of electronic article surveillance systems on permanent cardiac pacemakers," PACE, vol. 17, pp. 2021-2026, 1994.
31. M. McIvor, J. Reddinger, E. Floden, and R. Sheppard, "Study of pacemaker and implantable cardioverter defibrillator triggering by electronic article surveillance devices," PACE, vol. 21, pp. 1847-1861, 1998.
32. J. Mugica, L. Henry, and H. Podeur, "Study of interactions between permanent pacemakers and electronic antitheft surveillance systems," PACE, vol. 23, pp. 333-337, 2000.
33. K. Parhi, VLSI Digital Signal Processing. New York: Wiley, 1999.
34. B. Parhami, Computer Arithmetic. New York: Oxford University Press, 2000.
35. K. Nazifi and G. Hansson, "Industry's first RTL power optimization feature significantly improves power compiler's quality of results," Synopsys, Mountain View, CA, www.synopsys.com/news/pubs/rsvp/spr98/ rsvp⊃r98_6.html, 1998.
36. J. Deller, J. Hansen, and J. Proakis, Discrete-Time Processing of Speech Signals. New York: Wiley, 2000.
37. J. M. Rabaey, A. Chandrakasan, and B. Nikolić, Digital Integrated Circuits. Englewood Cliffs, NJ: Prentice Hall, 2003.
38. B. H. Calhoun, F. A. Honoré, and A. P. Chandrakasan, "A leakage reduction methodology for distributed mtcmos," IEEE J. Solid-State Circuits, vol. 39, no. 5, pp. 818-826, May 2004.
39. Y. Ye, S. Borkar, and V. De, "A new technique for standy leakage reduction in high-performance circuits," in Dig. Tech. Papers Symp. on VLSI Circuits, Jun. 1998, pp. 40-41.
40. W. Qifa, T. Yujing, and X. Wei, Oki Techno Centre Design Team Achieves Lowest Power Consumption Using Power Compiler, Synopsys, Mountain View, CA, 2002.
41. R. Troutman, "VLSI limitations from drain-induced barrier lowering," IEEE Trans. Electron. Devices, vol. ED-26, no. 4, pp. 461-468, Apr. 1979.
42. J. Pimbley and J. D. Meindl, "MOSFET scaling limits determined by subthreshold conduction," IEEE Trans. Electron. Devices, vol. 36, pp. 1711-1721, Sep. 1989.
43. K. Roy, S. Mukhopadhyay, and H. Mahmoodi-Meimand, "Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits," Proc. IEEE, vol. 91, no. 2, pp. 305-327, Feb. 2003.