A very low-power 8-bit ΣΔ Converter in a 0.8 μm CMOS technology for the sensing chain of a cardiac pacemaker, operating down to 1.8V

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 5, Issue , 2003, Pages

  Gerosa, A ^a   Neviani, A ^a  

^a UNIVERSITY OF PADOVA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CARDIOLOGY; CMOS INTEGRATED CIRCUITS; PACEMAKERS; SYSTEMS ANALYSIS;

SENSING CHAINS;

POWER CONVERTERS;

EID: 0038420773     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. J. Neves Rodrigues, V. Owall and L. Sornmo, QRS Detection for Pacemakers in a Noisy Environment Using a Time Lagged Artificial Neural Network" Proc. of ISCAS-01, Sydney, Australia, Vol. III, pp. 596-599
2. A. Novo, A. Gerosa and A. Neviani, A Sub-Micron CMOS Programmable Charge Pump for Implantable Pacemaker Analog Integrated Circuits and Signal Processing, Kluwer Academic Publ., Vol. 27, No. 3, June 2001, pp. 211-217
3. V. Cheung, H. Luong and M. Chan, A 0.9-V 0.2-μW CMOS Single-Opamp-Based Switched-Opamp ΣΔ Modulator for Pacemaker Applications Proc. ISCAS-02, Phoenix, Vol. V, pp. 185-188
4. V. Peluso et al., A 900-mV Low-Power ΣΔ A/D Converter with 77-dB Dynamic Range IEEE J. of Solid State Circuits, Vol. 33, No. 12, DEC 98, pp. 1887-1897
5. A. Varzaghani and M. Atarodi, A New Method to Increase the Dynamic Range of Switched OpAmp Delta-Sigma Modulators Proc. ISCAS-02, Phoenix, Vol. II, pp. 620-623
6. J. Galan et al., A 1. 1V Low-Power ΣΔ Modulator for 14-b 16KHz A/D Conversion Using A Novel Class AB Transconductance Amplifier Proc. ISCAS-02, Phoenix, Vol. II, pp. 616-619