VITA: Variation-Aware Interconnect Timing Analysis for symmetric and skewed sources of variation considering variational ramp input

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn , Issue , 2005, Pages 426-430

  Abbaspour, Soroush ^a   Fatemi, Hanif ^a   Pedram, Massoud ^a  

^a University of Southern California ^*  (United States)

Author keywords

Elmore delay; Moment calculation; Sources of variation; Statistical timing analysis

Indexed keywords

ELMORE DELAY; MOMENT CALCULATION; SOURCES OF VARIATION; STATISTICAL TIMING ANALYSIS;

ALGORITHMS; COMPUTER SIMULATION; ELECTRIC WIRE; GATES (TRANSISTOR); MONTE CARLO METHODS; STATISTICAL METHODS;

DIGITAL INTEGRATED CIRCUITS;

EID: 29244460684     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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