RC delay metrics for performance optimization

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 20, Issue 5, 2001, Pages 571-582

  Alpert, Charles J ^a,b   Devgan, Anirudh ^a,b   Kashyap, Chandramouli V ^a,b  

^a IEEE   (United States)

^b IBM   (United States)

Author keywords

Interconnect; Performance optimization; Simulation; Steiner tree; Timing analysis

Indexed keywords

TIMING ANALYSIS;

APPROXIMATION THEORY; CAPACITANCE; COMPUTER SIMULATION; ELECTRIC RESISTANCE; IMPULSE RESPONSE; MATHEMATICAL MODELS; OPTIMIZATION; PROBABILITY DENSITY FUNCTION; TRANSFER FUNCTIONS;

DELAY CIRCUITS;

EID: 0035333639     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.920682     Document Type: Article

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