Comparison of product failure rate to the component soft error rates in a multi-core digital signal processor

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2005, Pages 209-214

  Zhu, Xiaowei ^a   Baumann, Rob ^a   Pilch, Charles ^a   Zhou, Joe ^a   Jones, Jason ^a   Cirba, Claude ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

Digital signal processor; Single event upset; Soft error rate; System failure

Indexed keywords

DIGITAL SIGNAL PROCESSORS; SINGLE EVENT UPSET (SEU); SOFT ERROR RATE (SER); SYSTEM FAILURE;

ACCELERATION; ALPHA PARTICLES; CORRELATION METHODS; DATA REDUCTION; ERROR ANALYSIS; MICROPROCESSOR CHIPS;

DIGITAL SIGNAL PROCESSING;

EID: 28744436719     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)

1. R. Ronen, L. Shih-Lein, K. Lai, A. Mendelson, F. Pllack, and J. P. Shen, "Corning challenges in microarchitecture and architecture," Proc. IEEE, vol. 89, Mar., 2001, pp. 325-340.
2. J. Maiz and R. Baumann, "Radiation induced soft errors in silicon components and computer systems" in Tutorial, Int. Reliability Physics Symp., Dallas, April 2002.
3. R. Baumann, "The impact of technology scaling on soft error rate performance and limit to the efficacy of error correction" in IEDM Tech. Dig., 2002, pp.329-332.
4. N. Seifert, X. Zhu, L. Massengut, "Impact of scaling on soft error rates in commercial microprocessors" in IEEE Trans. Nucl. Sci., vol. 49, 2002, pp.3100-3106.
5. P. Shivakumar, M. Kistler, S. Keckler, D. Burger, L. Alvisi, "Modeling the effects of technology trend on soft error rates of combinational circuits" in Proc. Int. Dependable Systems and Networks, 2002, pp.389-398.
6. C. Dai, N. Hakim, S. Hareland, J. Maiz, and S Lee, "Alpha-SER modeling & simulation for sub-0.25um CMOS technology" in VLSI Tech. Dig., 1999, pp. 81-82.
7. N. Seifert, D. Moyer, N. Leland, and R. Hokinson, "Historical trends in alpha-particle induced soft error rates of the Alpha microprocessor," in Proc. Int. Reliability Physics Symp., 2000, pp.259-265.
8. H. T. Nguyen and Y. Yagil, "A systematic approach to SER estimation and solutions" in Proc. Int. Reliability Physics Symp., 2002, pp.60-70.
9. S. Kerns, "Transient-ionization and single event phenomena", in Ionizing Radiation Effects in MOS Devices and Circuits.,T. P. Ma and P. V. Dressendorfer, eds., (Wiley, New York, 1989).
10. J. Elder, J. Osborn, W. Kolsainski, R. Koga, "A method for characterizing a microprocessor's vulnerability to SEU" in IEEE Trans. Nucl. Sci.., vol. 35, 1988, pp.1678-1681.
11. N. Seifert, X. Zhu, D. Moyer, R. Mueller, N. Leland, R. Hokinson, M. Shade, and L. Massengill, "Frequency dependence of soft error rates for sub-micron CMOS technologies" in lEDMTech. Dig., 2001. pp. 14.4.1-14.4.4.
12. Los Alamos National Laboratory neutron facility.
13. "Measurement and Reporting of alpha Particles and Terrestrial cosmic Ray-Induced Soft Errors in Semiconductor Devices," JEDEC standard JESD89, www.jedec.org.
14. Y. Tosaka, S. Satoh, T. Itakura, H. Ehara, T. Ueda, G.A. Woffinden, and S. A. Wender, "Measurement and Analysis of Neutron-Induced Soft Errors in Sub-Half-Micron CMOS Circuits," in IEEE Tran. Electronic Devices, vol. 45, July. 1998, pp. 1453-1458.
15. T. Karnik, B. Bloechel, K. Soumyanath, V. De, and S. Borkar, "Scaling Trends of Cosmic Ray Induced Soft Errors in Static Latches beyond 0.18um," in Proc. IEEE Symp. VLSI, June. 2001, pp.61-62.
16. P. Roche, F. Jacquet, C. Caillat, and J. Schoellkopf, "An Alpha immune ultra low neutron SER high density SRAM" in Proc. Int. Reliability Physics Symp., 2004, pp.671-672.
17. International telecommunication union standard. ITU-T v.34, www.itu.int.