메뉴 건너뛰기




Volumn , Issue , 2005, Pages 161-166

Cost-effective low-power processor-in-memory-based reconfigurable datapath for multimedia applications

Author keywords

Datapath; Processor In Memory; Reconfigurable Computing

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COST EFFECTIVENESS; DATA ACQUISITION; DATA STORAGE EQUIPMENT; DIGITAL ARITHMETIC; PROGRAM PROCESSORS;

EID: 28444490088     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/lpe.2005.195507     Document Type: Conference Paper
Times cited : (27)

References (21)
  • 5
    • 26444592708 scopus 로고    scopus 로고
    • Highly efficient digital CMOS accelerator for image and graphics processing
    • 25-28 September
    • M. Margala, R. Lin, "Highly efficient digital CMOS accelerator for image and graphics processing", 15th Annual IEEE International ASIC/SOC Conference 2002, pp.127 - 132, 25-28 September 2002.
    • (2002) 15th Annual IEEE International ASIC/SOC Conference 2002 , pp. 127-132
    • Margala, M.1    Lin, R.2
  • 7
    • 0034844630 scopus 로고    scopus 로고
    • Implementation of DSP-RAM: An architecture for parallel digital signal processing in memory
    • 2001, 13-16 May
    • B. S.-H. Kwan, B. F. Cockburn, D. G. Elliott, "Implementation of DSP-RAM: an architecture for parallel digital signal processing in memory", Canadian Conference on Electrical and Computer Engineering, 2001, Vol. 1, pp. 341 - 345, 13-16 May 2001.
    • (2001) Canadian Conference on Electrical and Computer Engineering , vol.1 , pp. 341-345
    • Kwan, B.S.-H.1    Cockburn, B.F.2    Elliott, D.G.3
  • 9
    • 0032649626 scopus 로고    scopus 로고
    • Understanding multimedia application characteristics for designing programmable media processors
    • San Jose, CA, January
    • J. Fritts, W. Wolf, B. Liu, "Understanding multimedia application characteristics for designing programmable media processors, "SPIE Photonics West, Media Processors '99, San Jose, CA, pp. 2-13, January 1999.
    • (1999) SPIE Photonics West, Media Processors '99 , pp. 2-13
    • Fritts, J.1    Wolf, W.2    Liu, B.3
  • 10
    • 28444432620 scopus 로고    scopus 로고
    • Processor architectures for multimedia
    • November
    • S. Nazareth, R. Asokan. "Processor Architectures for Multimedia", academics paper, November 2001. http://www.cs.dartmouth.edu/ ~nazareth/academic/CS107.pdf
    • (2001) Academics Paper
    • Nazareth, S.1    Asokan, R.2
  • 11
    • 0003589319 scopus 로고
    • ANSI/IEEE Standard No. 754-1985, New York, Aug.
    • The institute of Electrical and Electronics Engineers, Inc., "IEEE Standard for Binary Floating-Point Arithmetic", ANSI/IEEE Standard No. 754-1985, New York, Aug. 1985.
    • (1985) IEEE Standard for Binary Floating-point Arithmetic
  • 15
    • 0017538003 scopus 로고
    • A fast computational algorithm for the discrete cosine transform
    • W.H. Chen, C.H. Smith, and S.C. Fralick, "A Fast Computational Algorithm for the Discrete Cosine Transform," IEEE Trans. Communications, vol. 25, pp. 1004-1009, 1977.
    • (1977) IEEE Trans. Communications , vol.25 , pp. 1004-1009
    • Chen, W.H.1    Smith, C.H.2    Fralick, S.C.3
  • 17
    • 84990575058 scopus 로고
    • Orthonormal bases of compactly supported wavelets
    • I. Daubechies, "Orthonormal Bases of Compactly Supported Wavelets." Comm. Pure Appl. Math., Vol 41, pp. 909-996, 1988.
    • (1988) Comm. Pure Appl. Math. , vol.41 , pp. 909-996
    • Daubechies, I.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.