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Volumn 1, Issue , 2001, Pages 341-346
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Implementation of DSP-RAM: An architecture for parallel digital signal processing in memory
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER HARDWARE DESCRIPTION LANGUAGES;
COMPUTER SIMULATION;
COSINE TRANSFORMS;
DIGITAL FILTERS;
MICROPROGRAMMING;
RANDOM ACCESS STORAGE;
VECTOR QUANTIZATION;
PARALLEL DATA PROCESSING;
DIGITAL SIGNAL PROCESSING;
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EID: 0034844630
PISSN: 08407789
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (9)
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References (6)
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