Interfacial stress characterization for stress-induced voiding in Cu/Low-k interconnects

Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA

Volumn , Issue , 2005, Pages 96-99

  Wang, Robin C J ^a,b   Chen, L D ^a   Yen, P C ^a   Lin, S R ^a   Chiu, C C ^a   Wu, Kenneth ^a   Chang Liao, K S ^b  

^a TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^b NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

BEOL reliability; Cu interconnects; Finite element analysis (FEA) and hydrostatics stress; Stress migration; Stress induced voiding (SIV); Stressvoiding

Indexed keywords

COPPER; ELECTRIC RESISTANCE; FINITE ELEMENT METHOD; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; THREE DIMENSIONAL;

CU/LOW-K SYSTEMS; INTERCONNECT STRUCTURES; LOCALIZED STRESS VARIATIONS; STRESS-INDUCED VOIDING (SIV);

STRESS ANALYSIS;

EID: 28044438368     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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