Current-mode signaling in deep submicrometer global interconnects

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 11, Issue 3, 2003, Pages 406-417

  Bashirullah, Rizwan ^a   Liu, Wentai ^a,b   Cavin III, Ralph K ^a,c  

^a North Carolina State University   (United States)

^b University of California Santa Cruz   (United States)

^c SEMICONDUCTOR RESEARCH CORPORATION   (United States)

Author keywords

Current mode; Delay; Interconnect; On chip signaling; Repeater

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; DELAY CIRCUITS; ELECTRIC CURRENTS; ELECTRIC RESISTANCE; INTEGRATED CIRCUIT LAYOUT; LUMPED PARAMETER NETWORKS;

CURRENT MODE REPEATER INSERTION; CURRENT MODEL SIGNALING; DEEP SUBMICROMETER GLOBAL INTERCONNECTS; ON-CHIP SIGNALING;

VLSI CIRCUITS;

EID: 0042420599     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2003.812366     Document Type: Article

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