Test structure measuring inter- and intralayer coupling capacitance of interconnection with subfemtofarad resolution

IEEE Transactions on Electron Devices

Volumn 51, Issue 5, 2004, Pages 726-735

  Kunikiyo, Tatsuya ^a   Watanabe, Tetsuya ^a   Kanamoto, Toshiki ^a   Asazato, Hironobu ^b   Shirota, Mitsutoshi ^a   Eikyu, Katsumi ^a   Ajioka, Yoshihide ^a   Makino, Hiroshi ^a   Ishikawa, Kiyoshi ^a   Iwade, Shuhei ^c   Inoue, Yasuo ^a  

^a RENESAS TECHNOLOGY CORP   (Japan)

^b Renesas Design Corp   (Japan)

^c OSAKA INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

Capacitance measurement; Integrated circuit interconnection; Monitoring; Optimization method

Indexed keywords

CAPACITANCE MEASUREMENT; COPPER; NONDESTRUCTIVE EXAMINATION; OPTIMIZATION; SEMICONDUCTOR DEVICE STRUCTURES; ULSI CIRCUITS;

INTERLAYER COUPLING CAPACITANCE; INTRALAYER COUPLING CAPACITANCE; SUBFEMTOFARAD RESOLUTION;

INTEGRATED CIRCUIT TESTING;

EID: 2442573874     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.826899     Document Type: Article

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